u-boot/arch/arm/mach-omap2/omap5/abb.c
Nishanth Menon 0459bc30b6 ARM: OMAP5: Enable support for AVS0 for OMAP5 production devices
OMAP5432 did go into production with AVS class0 registers which were
mutually exclusive from AVS Class 1.5 registers.

Most OMAP5-uEVM boards use the pre-production Class1.5 which has
production efuse registers set to 0. However on production devices,
these are set to valid data.

scale_vcore logic is already smart enough to detect this and use the
"Nominal voltage" on devices that do not have efuse registers populated.

On a test production device populated as follows:
MPU OPP_NOM:
=> md.l 0x04A0021C4 1
4a0021c4: 03a003e9                               ....
(0x3e9 = 1.01v) vs nom voltage of 1.06v
MPU OPP_HIGH:
=> md.l 0x04A0021C8 1
4a0021c8: 03400485                               ..@.

MM OPP_NOM:
=> md.l 0x04A0021A4 1
4a0021a4: 038003d4                               ....
(0x3d4 = 980mV) vs nom voltage of 1.025v
MM OPP_OD:
=> md.l 0x04A0021A8 1
4a0021a8: 03600403                               ..`.

CORE OPP_NOM:
=> md.l 0x04A0021D8 1
4a0021d8: 000003cf                               ....
(0x3cf = 975mV) vs nom voltage of 1.040v

Since the efuse values are'nt currently used, we do not regress on
existing pre-production samples (they continue to use nominal voltage).

But on boards that do have production samples populated, we can leverage
the optimal voltages necessary for proper operation.

Tested on:
a) 720-2644-001 OMAP5UEVM with production sample.
b) 750-2628-222(A) UEVM5432G-02 with pre-production sample.

Data based on OMAP5432 Technical reference Manual SWPU282AF (May
2012-Revised Aug 2016)

NOTE: All collaterals on OMAP5432 silicon itself seems to have been
removed from ti.com, though EVM details are still available:
http://www.ti.com/tool/OMAP5432-EVM

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2017-08-13 15:17:35 -04:00

57 lines
1.4 KiB
C

/*
* Adaptive Body Bias programming sequence for OMAP5 family
*
* (C) Copyright 2013
* Texas Instruments, <www.ti.com>
*
* Andrii Tseglytskyi <andrii.tseglytskyi@ti.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/omap_common.h>
#include <asm/io.h>
/*
* Setup LDOVBB for OMAP5.
* On OMAP5+ some ABB settings are fused. They are handled
* in the following way:
*
* 1. corresponding EFUSE register contains ABB enable bit
* and VSET value
* 2. If ABB enable bit is set to 1, than ABB should be
* enabled, otherwise ABB should be disabled
* 3. If ABB is enabled, than VSET value should be copied
* to corresponding MUX control register
*/
s8 abb_setup_ldovbb(u32 fuse, u32 ldovbb)
{
u32 vset;
u32 fuse_enable_mask = OMAP5_PROD_ABB_FUSE_ENABLE_MASK;
u32 fuse_vset_mask = OMAP5_PROD_ABB_FUSE_VSET_MASK;
if (!is_omap54xx()) {
/* DRA7 */
fuse_enable_mask = DRA7_ABB_FUSE_ENABLE_MASK;
fuse_vset_mask = DRA7_ABB_FUSE_VSET_MASK;
}
/*
* ABB parameters must be properly fused
* otherwise ABB should be disabled
*/
vset = readl(fuse);
if (!(vset & fuse_enable_mask))
return -1;
/* prepare VSET value for LDOVBB mux register */
vset &= fuse_vset_mask;
vset >>= ffs(fuse_vset_mask) - 1;
vset <<= ffs(OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK) - 1;
vset |= OMAP5_ABB_LDOVBBMPU_MUX_CTRL_MASK;
/* setup LDOVBB using fused value */
clrsetbits_le32(ldovbb, OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK, vset);
return 0;
}