mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-19 09:43:08 +00:00
2eedb6d93f
The cpuid on RK3568 is located at 0xa instead of 0x7 as all other SoCs. Add and use a CFG_CPUID_OFFSET to define this offset. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
70 lines
961 B
Text
70 lines
961 B
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* (C) Copyright 2021 Rockchip Electronics Co., Ltd
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*/
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#include "rockchip-u-boot.dtsi"
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/ {
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aliases {
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mmc0 = &sdhci;
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mmc1 = &sdmmc0;
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};
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chosen {
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u-boot,spl-boot-order = &sdhci, &sdmmc0;
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};
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dmc: dmc {
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compatible = "rockchip,rk3568-dmc";
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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otp: nvmem@fe38c000 {
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compatible = "rockchip,rk3568-otp";
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reg = <0x0 0xfe38c000 0x0 0x4000>;
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#address-cells = <1>;
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#size-cells = <1>;
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status = "okay";
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cpu_id: id@a {
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reg = <0x0a 0x10>;
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};
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};
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};
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&combphy1 {
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/delete-property/ assigned-clocks;
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/delete-property/ assigned-clock-rates;
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};
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&cru {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&pmucru {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&grf {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&pmugrf {
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u-boot,dm-pre-reloc;
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status = "okay";
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};
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&sdhci {
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u-boot,dm-spl;
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status = "okay";
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};
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&sdmmc0 {
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u-boot,dm-spl;
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status = "okay";
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};
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