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https://github.com/AsahiLinux/u-boot
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54e1aa236f
Add support for the Variscite VAR-SOM-IMX93 evaluation kit. The SoM consists of an NXP iMX93 dual A55 CPU. The SoM is mounted on a Variscite Symphony SBC. Signed-off-by: Mathieu Othacehe <m.othacehe@gmail.com>
48 lines
1.2 KiB
C
48 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2022 NXP
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* Copyright 2023 Variscite Ltd.
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*/
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#ifndef __IMX93_VAR_SOM_H
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#define __IMX93_VAR_SOM_H
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#include <linux/sizes.h>
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#include <linux/stringify.h>
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#include <asm/arch/imx-regs.h>
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#define CFG_SYS_SDRAM_BASE 0x80000000
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#define CFG_SYS_UBOOT_BASE \
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(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 0) \
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func(MMC, mmc, 1)
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#include <config_distro_bootcmd.h>
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/* Initial environment variables */
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#define CFG_EXTRA_ENV_SETTINGS BOOTENV
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#define CFG_SYS_INIT_RAM_ADDR 0x80000000
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#define CFG_SYS_INIT_RAM_SIZE 0x200000
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#define CFG_SYS_SDRAM_BASE 0x80000000
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#define PHYS_SDRAM 0x80000000
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#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
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#define DEFAULT_SDRAM_SIZE (512 * SZ_1M) /* 512MB Minimum DDR4, see get_dram_size */
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#define VAR_EEPROM_DRAM_START (PHYS_SDRAM + (DEFAULT_SDRAM_SIZE >> 1))
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#define VAR_SOM_EEPROM_I2C_NAME "i2c@42530000"
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#define VAR_CARRIER_EEPROM_I2C_NAME "i2c@44340000"
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#define CFG_SYS_FSL_USDHC_NUM 2
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/* Using ULP WDOG for reset */
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#define WDOG_BASE_ADDR WDG3_BASE_ADDR
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#if defined(CONFIG_CMD_NET)
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#define PHY_ANEG_TIMEOUT 20000
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#endif
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#endif
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