mirror of
https://github.com/AsahiLinux/u-boot
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
181 lines
3.2 KiB
C
181 lines
3.2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*/
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#include <common.h>
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/*
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* CPU test
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* Branch instructions: b, bl, bc
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*
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* The first 2 instructions (b, bl) are verified by jumping
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* to a fixed address and checking whether control was transferred
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* to that very point. For the bl instruction the value of the
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* link register is checked as well (using mfspr).
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* To verify the bc instruction various combinations of the BI/BO
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* fields, the CTR and the condition register values are
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* checked. The list of such combinations is pre-built and
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* linked in U-Boot at build time.
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*/
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#include <post.h>
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#include "cpu_asm.h"
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#if CONFIG_POST & CONFIG_SYS_POST_CPU
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extern void cpu_post_exec_11 (ulong *code, ulong *res, ulong op1);
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extern void cpu_post_exec_31 (ulong *code, ulong *ctr, ulong *lr, ulong *jump,
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ulong cr);
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static int cpu_post_test_bc (ulong cmd, ulong bo, ulong bi,
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int pjump, int decr, int link, ulong pctr, ulong cr)
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{
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int ret = 0;
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ulong lr = 0;
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ulong ctr = pctr;
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ulong jump;
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unsigned long code[] =
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{
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ASM_MTCR(6),
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ASM_MFLR(6),
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ASM_MTCTR(3),
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ASM_MTLR(4),
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ASM_LI(5, 1),
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ASM_3O(cmd, bo, bi, 8),
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ASM_LI(5, 0),
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ASM_MFCTR(3),
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ASM_MFLR(4),
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ASM_MTLR(6),
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ASM_BLR,
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};
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cpu_post_exec_31 (code, &ctr, &lr, &jump, cr);
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if (ret == 0)
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ret = pjump == jump ? 0 : -1;
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if (ret == 0)
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{
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if (decr)
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ret = pctr == ctr + 1 ? 0 : -1;
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else
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ret = pctr == ctr ? 0 : -1;
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}
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if (ret == 0)
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{
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if (link)
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ret = lr == (ulong) code + 24 ? 0 : -1;
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else
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ret = lr == 0 ? 0 : -1;
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}
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return ret;
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}
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int cpu_post_test_b (void)
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{
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int ret = 0;
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unsigned int i;
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int flag = disable_interrupts();
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if (ret == 0)
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{
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ulong code[] =
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{
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ASM_MFLR(4),
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ASM_MTLR(3),
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ASM_B(4),
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ASM_MFLR(3),
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ASM_MTLR(4),
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ASM_BLR,
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};
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ulong res;
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cpu_post_exec_11 (code, &res, 0);
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ret = res == 0 ? 0 : -1;
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if (ret != 0)
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{
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post_log ("Error at b1 test !\n");
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}
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}
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if (ret == 0)
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{
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ulong code[] =
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{
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ASM_MFLR(4),
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ASM_MTLR(3),
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ASM_BL(4),
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ASM_MFLR(3),
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ASM_MTLR(4),
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ASM_BLR,
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};
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ulong res;
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cpu_post_exec_11 (code, &res, 0);
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ret = res == (ulong)code + 12 ? 0 : -1;
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if (ret != 0)
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{
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post_log ("Error at b2 test !\n");
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}
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}
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if (ret == 0)
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{
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ulong cc, cd;
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int cond;
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ulong ctr;
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int link;
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i = 0;
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for (cc = 0; cc < 4 && ret == 0; cc++)
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{
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for (cd = 0; cd < 4 && ret == 0; cd++)
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{
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for (link = 0; link <= 1 && ret == 0; link++)
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{
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for (cond = 0; cond <= 1 && ret == 0; cond++)
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{
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for (ctr = 1; ctr <= 2 && ret == 0; ctr++)
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{
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int decr = cd < 2;
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int cr = cond ? 0x80000000 : 0x00000000;
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int jumpc = cc >= 2 ||
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(cc == 0 && !cond) ||
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(cc == 1 && cond);
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int jumpd = cd >= 2 ||
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(cd == 0 && ctr != 1) ||
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(cd == 1 && ctr == 1);
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int jump = jumpc && jumpd;
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ret = cpu_post_test_bc (link ? OP_BCL : OP_BC,
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(cc << 3) + (cd << 1), 0, jump, decr, link,
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ctr, cr);
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if (ret != 0)
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{
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post_log ("Error at b3 test %d !\n", i);
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}
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i++;
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}
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}
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}
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}
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}
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}
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if (flag)
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enable_interrupts();
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return ret;
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}
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#endif
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