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41b2182af7
While working on an LX2160 based board and updating to latest mainline I noticed problems using the HW accelerated hash functions on this platform, when trying to boot a FIT Kernel image. Here the resulting error message: Using 'conf-freescale_lx2160a.dtb' configuration Trying 'kernel-1' kernel subimage Verifying Hash Integrity ... sha256Error: Address arguments are not aligned CAAM was not setup properly or it is faulty error! Bad hash value for 'hash-1' hash node in 'kernel-1' image node Bad Data Hash ERROR: can't get kernel image! Testing and checking with Gaurav Jain from NXP has revealed, that this alignment check is not necessary here at all. So let's remove this check completely. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Gaurav Jain <gaurav.jain@nxp.com> Cc: dullfire@yahoo.com Reviewed-by: Gaurav Jain <gaurav.jain@nxp.com>
237 lines
6.1 KiB
C
237 lines
6.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2014 Freescale Semiconductor, Inc.
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* Copyright 2021 NXP
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*/
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#include <common.h>
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#include <cpu_func.h>
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#include <log.h>
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#include <malloc.h>
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#include <memalign.h>
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#include "jobdesc.h"
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#include "desc.h"
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#include "jr.h"
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#include "fsl_hash.h"
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#include <hw_sha.h>
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#include <asm/cache.h>
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#include <linux/errno.h>
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#define CRYPTO_MAX_ALG_NAME 80
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#define SHA1_DIGEST_SIZE 20
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#define SHA256_DIGEST_SIZE 32
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struct caam_hash_template {
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char name[CRYPTO_MAX_ALG_NAME];
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unsigned int digestsize;
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u32 alg_type;
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};
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enum caam_hash_algos {
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SHA1 = 0,
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SHA256
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};
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static struct caam_hash_template driver_hash[] = {
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{
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.name = "sha1",
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.digestsize = SHA1_DIGEST_SIZE,
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.alg_type = OP_ALG_ALGSEL_SHA1,
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},
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{
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.name = "sha256",
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.digestsize = SHA256_DIGEST_SIZE,
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.alg_type = OP_ALG_ALGSEL_SHA256,
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},
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};
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static enum caam_hash_algos get_hash_type(struct hash_algo *algo)
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{
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if (!strcmp(algo->name, driver_hash[SHA1].name))
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return SHA1;
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else
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return SHA256;
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}
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/* Create the context for progressive hashing using h/w acceleration.
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*
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* @ctxp: Pointer to the pointer of the context for hashing
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* @caam_algo: Enum for SHA1 or SHA256
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* Return: 0 if ok, -ENOMEM on error
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*/
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static int caam_hash_init(void **ctxp, enum caam_hash_algos caam_algo)
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{
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*ctxp = calloc(1, sizeof(struct sha_ctx));
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if (*ctxp == NULL) {
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debug("Cannot allocate memory for context\n");
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return -ENOMEM;
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}
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return 0;
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}
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/*
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* Update sg table for progressive hashing using h/w acceleration
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*
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* The context is freed by this function if an error occurs.
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* We support at most 32 Scatter/Gather Entries.
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*
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* @hash_ctx: Pointer to the context for hashing
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* @buf: Pointer to the buffer being hashed
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* @size: Size of the buffer being hashed
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* @is_last: 1 if this is the last update; 0 otherwise
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* @caam_algo: Enum for SHA1 or SHA256
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* Return: 0 if ok, -EINVAL on error
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*/
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static int caam_hash_update(void *hash_ctx, const void *buf,
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unsigned int size, int is_last,
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enum caam_hash_algos caam_algo)
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{
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uint32_t final;
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caam_dma_addr_t addr = virt_to_phys((void *)buf);
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struct sha_ctx *ctx = hash_ctx;
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if (ctx->sg_num >= MAX_SG_32) {
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free(ctx);
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return -EINVAL;
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}
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#ifdef CONFIG_CAAM_64BIT
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sec_out32(&ctx->sg_tbl[ctx->sg_num].addr_hi, (uint32_t)(addr >> 32));
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#else
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sec_out32(&ctx->sg_tbl[ctx->sg_num].addr_hi, 0x0);
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#endif
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sec_out32(&ctx->sg_tbl[ctx->sg_num].addr_lo, (caam_dma_addr_t)addr);
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sec_out32(&ctx->sg_tbl[ctx->sg_num].len_flag,
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(size & SG_ENTRY_LENGTH_MASK));
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ctx->sg_num++;
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if (is_last) {
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final = sec_in32(&ctx->sg_tbl[ctx->sg_num - 1].len_flag) |
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SG_ENTRY_FINAL_BIT;
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sec_out32(&ctx->sg_tbl[ctx->sg_num - 1].len_flag, final);
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}
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return 0;
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}
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/*
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* Perform progressive hashing on the given buffer and copy hash at
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* destination buffer
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*
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* The context is freed after successful completion of hash operation.
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* In case of failure, context is not freed.
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* @hash_ctx: Pointer to the context for hashing
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* @dest_buf: Pointer to the destination buffer where hash is to be copied
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* @size: Size of the buffer being hashed
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* @caam_algo: Enum for SHA1 or SHA256
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* Return: 0 if ok, -EINVAL on error
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*/
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static int caam_hash_finish(void *hash_ctx, void *dest_buf,
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int size, enum caam_hash_algos caam_algo)
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{
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uint32_t len = 0;
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struct sha_ctx *ctx = hash_ctx;
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int i = 0, ret = 0;
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if (size < driver_hash[caam_algo].digestsize) {
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return -EINVAL;
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}
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for (i = 0; i < ctx->sg_num; i++)
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len += (sec_in32(&ctx->sg_tbl[i].len_flag) &
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SG_ENTRY_LENGTH_MASK);
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inline_cnstr_jobdesc_hash(ctx->sha_desc, (uint8_t *)ctx->sg_tbl, len,
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ctx->hash,
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driver_hash[caam_algo].alg_type,
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driver_hash[caam_algo].digestsize,
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1);
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flush_dcache_range((ulong)ctx->sg_tbl, (ulong)(ctx->sg_tbl) + len);
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flush_dcache_range((ulong)ctx->sha_desc,
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(ulong)(ctx->sha_desc) + (sizeof(uint32_t) * MAX_CAAM_DESCSIZE));
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flush_dcache_range((ulong)ctx->hash,
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(ulong)(ctx->hash) + driver_hash[caam_algo].digestsize);
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ret = run_descriptor_jr(ctx->sha_desc);
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if (ret) {
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debug("Error %x\n", ret);
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return ret;
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} else {
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invalidate_dcache_range((ulong)ctx->hash,
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(ulong)(ctx->hash) + driver_hash[caam_algo].digestsize);
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memcpy(dest_buf, ctx->hash, sizeof(ctx->hash));
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}
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free(ctx);
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return ret;
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}
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int caam_hash(const unsigned char *pbuf, unsigned int buf_len,
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unsigned char *pout, enum caam_hash_algos algo)
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{
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int ret = 0;
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uint32_t *desc;
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unsigned int size;
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desc = malloc_cache_aligned(sizeof(int) * MAX_CAAM_DESCSIZE);
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if (!desc) {
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debug("Not enough memory for descriptor allocation\n");
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return -ENOMEM;
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}
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size = ALIGN(buf_len, ARCH_DMA_MINALIGN);
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flush_dcache_range((unsigned long)pbuf, (unsigned long)pbuf + size);
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inline_cnstr_jobdesc_hash(desc, pbuf, buf_len, pout,
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driver_hash[algo].alg_type,
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driver_hash[algo].digestsize,
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0);
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size = ALIGN(sizeof(int) * MAX_CAAM_DESCSIZE, ARCH_DMA_MINALIGN);
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flush_dcache_range((unsigned long)desc, (unsigned long)desc + size);
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size = ALIGN(driver_hash[algo].digestsize, ARCH_DMA_MINALIGN);
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invalidate_dcache_range((unsigned long)pout, (unsigned long)pout + size);
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ret = run_descriptor_jr(desc);
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size = ALIGN(driver_hash[algo].digestsize, ARCH_DMA_MINALIGN);
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invalidate_dcache_range((unsigned long)pout,
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(unsigned long)pout + size);
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free(desc);
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return ret;
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}
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void hw_sha256(const unsigned char *pbuf, unsigned int buf_len,
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unsigned char *pout, unsigned int chunk_size)
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{
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if (caam_hash(pbuf, buf_len, pout, SHA256))
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printf("CAAM was not setup properly or it is faulty\n");
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}
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void hw_sha1(const unsigned char *pbuf, unsigned int buf_len,
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unsigned char *pout, unsigned int chunk_size)
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{
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if (caam_hash(pbuf, buf_len, pout, SHA1))
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printf("CAAM was not setup properly or it is faulty\n");
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}
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int hw_sha_init(struct hash_algo *algo, void **ctxp)
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{
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return caam_hash_init(ctxp, get_hash_type(algo));
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}
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int hw_sha_update(struct hash_algo *algo, void *ctx, const void *buf,
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unsigned int size, int is_last)
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{
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return caam_hash_update(ctx, buf, size, is_last, get_hash_type(algo));
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}
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int hw_sha_finish(struct hash_algo *algo, void *ctx, void *dest_buf,
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int size)
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{
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return caam_hash_finish(ctx, dest_buf, size, get_hash_type(algo));
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}
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