mirror of
https://github.com/AsahiLinux/u-boot
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caa4daa2ae
We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
124 lines
2.8 KiB
C
124 lines
2.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018 Marek Vasut <marex@denx.de>
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*
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* Altera SoCFPGA EMAC extras
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <dm.h>
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#include <clk.h>
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#include <phy.h>
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#include <regmap.h>
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#include <reset.h>
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#include <syscon.h>
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#include "designware.h"
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#include <dm/device_compat.h>
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#include <linux/err.h>
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#include <asm/arch/system_manager.h>
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struct dwmac_socfpga_platdata {
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struct dw_eth_pdata dw_eth_pdata;
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void *phy_intf;
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u32 reg_shift;
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};
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static int dwmac_socfpga_ofdata_to_platdata(struct udevice *dev)
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{
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struct dwmac_socfpga_platdata *pdata = dev_get_platdata(dev);
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struct regmap *regmap;
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struct ofnode_phandle_args args;
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void *range;
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int ret;
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ret = dev_read_phandle_with_args(dev, "altr,sysmgr-syscon", NULL,
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2, 0, &args);
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if (ret) {
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dev_err(dev, "Failed to get syscon: %d\n", ret);
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return ret;
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}
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if (args.args_count != 2) {
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dev_err(dev, "Invalid number of syscon args\n");
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return -EINVAL;
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}
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regmap = syscon_node_to_regmap(args.node);
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if (IS_ERR(regmap)) {
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ret = PTR_ERR(regmap);
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dev_err(dev, "Failed to get regmap: %d\n", ret);
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return ret;
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}
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range = regmap_get_range(regmap, 0);
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if (!range) {
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dev_err(dev, "Failed to get regmap range\n");
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return -ENOMEM;
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}
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pdata->phy_intf = range + args.args[0];
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pdata->reg_shift = args.args[1];
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return designware_eth_ofdata_to_platdata(dev);
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}
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static int dwmac_socfpga_probe(struct udevice *dev)
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{
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struct dwmac_socfpga_platdata *pdata = dev_get_platdata(dev);
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struct eth_pdata *edata = &pdata->dw_eth_pdata.eth_pdata;
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struct reset_ctl_bulk reset_bulk;
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int ret;
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u32 modereg;
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u32 modemask;
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switch (edata->phy_interface) {
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case PHY_INTERFACE_MODE_MII:
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case PHY_INTERFACE_MODE_GMII:
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modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_GMII_MII;
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break;
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case PHY_INTERFACE_MODE_RMII:
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modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RMII;
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break;
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case PHY_INTERFACE_MODE_RGMII:
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modereg = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII;
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break;
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default:
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dev_err(dev, "Unsupported PHY mode\n");
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return -EINVAL;
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}
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ret = reset_get_bulk(dev, &reset_bulk);
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if (ret) {
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dev_err(dev, "Failed to get reset: %d\n", ret);
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return ret;
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}
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reset_assert_bulk(&reset_bulk);
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modemask = SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << pdata->reg_shift;
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clrsetbits_le32(pdata->phy_intf, modemask,
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modereg << pdata->reg_shift);
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reset_release_bulk(&reset_bulk);
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return designware_eth_probe(dev);
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}
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static const struct udevice_id dwmac_socfpga_ids[] = {
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{ .compatible = "altr,socfpga-stmmac" },
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{ }
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};
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U_BOOT_DRIVER(dwmac_socfpga) = {
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.name = "dwmac_socfpga",
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.id = UCLASS_ETH,
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.of_match = dwmac_socfpga_ids,
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.ofdata_to_platdata = dwmac_socfpga_ofdata_to_platdata,
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.probe = dwmac_socfpga_probe,
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.ops = &designware_eth_ops,
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.priv_auto = sizeof(struct dw_eth_dev),
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.plat_auto = sizeof(struct dwmac_socfpga_platdata),
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.flags = DM_FLAG_ALLOC_PRIV_DMA,
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};
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