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Nikhil Badola ca7fb12cc1 armv8/lsch3/config: Define CONFIG_SYS_CACHELINE_SIZE for LS2085A 
Define CONFIG_SYS_CACHELINE_SIZE for LS2085A which is required by
USB XHCI stack for alignment

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2015-08-03 12:06:38 -07:00
..
asm armv8/lsch3/config: Define CONFIG_SYS_CACHELINE_SIZE for LS2085A 2015-08-03 12:06:38 -07:00
debug arm: debug: replace license blocks with SPDX 2014-10-26 22:22:09 +01:00