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a3501a4a44
Considering the boot time requirements, Cortex-A core should be able to start immediately after SPL on R5. Add support for the same. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
69 lines
1.6 KiB
Text
69 lines
1.6 KiB
Text
if ARCH_K3
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choice
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prompt "Texas Instruments' K3 based SoC select"
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optional
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config SOC_K3_AM6
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bool "TI's K3 based AM6 SoC Family Support"
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endchoice
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config SYS_SOC
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default "k3"
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config SYS_K3_NON_SECURE_MSRAM_SIZE
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hex
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default 0x80000
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help
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Describes the total size of the MCU MSRAM. This doesn't
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specify the total size of SPL as ROM can use some part
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of this RAM. Once ROM gives control to SPL then this
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complete size can be usable.
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config SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE
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hex
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default 0x58000
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help
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Describes the maximum size of the image that ROM can download
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from any boot media.
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config SYS_K3_MCU_SCRATCHPAD_BASE
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hex
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default 0x40280000 if SOC_K3_AM6
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help
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Describes the base address of MCU Scratchpad RAM.
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config SYS_K3_MCU_SCRATCHPAD_SIZE
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hex
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default 0x200 if SOC_K3_AM6
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help
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Describes the size of MCU Scratchpad RAM.
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config SYS_K3_BOOT_PARAM_TABLE_INDEX
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hex
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default 0x41c7fbfc if SOC_K3_AM6
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help
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Address at which ROM stores the value which determines if SPL
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is booted up by primary boot media or secondary boot media.
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config SYS_K3_KEY
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string "Key used to generate x509 certificate"
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help
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This option enables to provide a custom key that can be used for
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generating x509 certificate for spl binary. If not needed leave
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it blank so that a random key is generated and used.
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config SYS_K3_BOOT_CORE_ID
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int
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default 16
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config SYS_K3_SPL_ATF
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bool "Start Cortex-A from SPL"
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depends on SPL && CPU_V7R
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help
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Enabling this will try to start Cortex-A (typically with ATF)
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after SPL from R5.
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source "board/ti/am65x/Kconfig"
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endif
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