u-boot

mirror of https://github.com/AsahiLinux/u-boot synced 2024-12-19 09:43:08 +00:00

History

Tom Rini 93145335fb nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig The way that we use this file currently means that we have to guard it in every platform Kconfig. But it is also required in all NXP platforms, including non-reference platforms. Make all options in it have appropriate dependencies so that we can include it a single time under arch/Kconfig Signed-off-by: Tom Rini <trini@konsulko.com>		2022-07-05 17:03:02 -04:00
..
ddr.c	common: Drop asm/global_data.h from common header	2021-02-02 15:33:42 -05:00
ddr.h	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
eth.c	net: freescale: replace usage of phy-mode = "sgmii-2500" with "2500base-x"	2021-09-28 18:50:56 +03:00
Kconfig	nxp: Make board/freescale/common/Kconfig safe to include once in arch/Kconfig	2022-07-05 17:03:02 -04:00
ls1043aqds.c	Finish conversion of CONFIG_SYS_CLK_FREQ to Kconfig	2021-12-27 16:20:18 -05:00
ls1043aqds_pbi.cfg	armv8/ls1043aqds: add LS1043AQDS board support	2015-11-30 09:11:10 -08:00
ls1043aqds_qixis.h	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
ls1043aqds_rcw_nand.cfg	armv8/ls1043aqds/rcw: change core frequency to 1600MHz	2015-12-17 08:52:18 +08:00
ls1043aqds_rcw_sd_ifc.cfg	armv8/ls1043aqds/rcw: change core frequency to 1600MHz	2015-12-17 08:52:18 +08:00
ls1043aqds_rcw_sd_qspi.cfg	armv8/ls1043aqds: add QSPI support in SD boot	2016-01-27 08:28:55 -08:00
MAINTAINERS	Add TFA boot flow for some Layerscape platforms	2018-12-10 17:19:59 -05:00
Makefile	armv8: ls1043ardb: SPL size reduction	2017-04-17 09:03:30 -07:00
README	net: replace the "xfi" phy-mode with "10gbase-r"	2021-09-28 18:50:56 +03:00

README

Overview
--------
The LS1043A Development System (QDS) is a high-performance computing,
evaluation, and development platform that supports the QorIQ LS1043A
LayerScape Architecture processor. The LS1043AQDS provides SW development
platform for the Freescale LS1043A processor series, with a complete
debugging environment.

LS1043A SoC Overview
--------------------
Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS1043A
SoC overview.

 LS1043AQDS board Overview
 -----------------------
 - SERDES Connections, 4 lanes supporting:
      - PCI Express - 3.0
      - SGMII, SGMII 2.5
      - QSGMII
      - SATA 3.0
      - 10GBase-R
 - DDR Controller
     - 2GB 40bits (8-bits ECC) DDR4 SDRAM. Support rates of up to 1600MT/s
 -IFC/Local Bus
    - One in-socket 128 MB NOR flash 16-bit data bus
    - One 512 MB NAND flash with ECC support
    - PromJet Port
    - FPGA connection
 - USB 3.0
    - Three high speed USB 3.0 ports
    - First USB 3.0 port configured as Host with Type-A connector
    - The other two USB 3.0 ports configured as OTG with micro-AB connector
 - SDHC port connects directly to an adapter card slot, featuring:
    - Optional clock feedback paths, and optional high-speed voltage translation assistance
    - SD slots for SD, SDHC (1x, 4x, 8x), and/or MMC
    - eMMC memory devices
 - DSPI: Onboard support for three SPI flash memory devices
 - 4 I2C controllers
 - One SATA onboard connectors
 - UART
   - Two 4-pin serial ports at up to 115.2 Kbit/s
   - Two DB9 D-Type connectors supporting one Serial port each
 - ARM JTAG support

Memory map from core's view
----------------------------
Start Address	End Address	Description		Size
0x00_0000_0000	0x00_000F_FFFF	Secure Boot ROM		1MB
0x00_0100_0000	0x00_0FFF_FFFF	CCSRBAR			240MB
0x00_1000_0000	0x00_1000_FFFF	OCRAM0			64KB
0x00_1001_0000	0x00_1001_FFFF	OCRAM1			64KB
0x00_2000_0000	0x00_20FF_FFFF	DCSR			16MB
0x00_6000_0000	0x00_67FF_FFFF	IFC - NOR Flash		128MB
0x00_7E80_0000	0x00_7E80_FFFF	IFC - NAND Flash	64KB
0x00_7FB0_0000	0x00_7FB0_0FFF	IFC - FPGA		4KB
0x00_8000_0000	0x00_FFFF_FFFF	DRAM1			2GB

Booting Options
---------------
a) Promjet Boot
b) NOR boot
c) NAND boot
d) SD boot
e) QSPI boot