Peter Hoyes 8d78a6b674 vexpress64: Add ARMv8R-64 board variant ... The ARMv8-R64 architecture introduces optional VMSA (paging based MMU) support in the EL1/0 translation regime, which makes that part mostly compatible to ARMv8-A. Add a new board variant to describe the "BASE-R64" FVP model, which inherits a lot from the existing v8-A FVP support. One major difference is that the memory map in "inverted": DRAM starts at 0x0, MMIO is at 2GB [1]. * Create new TARGET_VEXPRESS64_BASER_FVP target, sharing most of the exising configuration. * Implement inverted memory map in vexpress_aemv8.h * Create vexpress_aemv8r defconfig * Provide an MMU memory map for the BASER_FVP * Update vexpress64 documentation At the moment the boot-wrapper is the only supported secure firmware. As there is no official DT for the board yet, we rely on it being supplied by the boot-wrapper into U-Boot, so use OF_HAS_PRIOR_STAGE, and go with a dummy DT for now. [1] https://developer.arm.com/documentation/100964/1114/Base-Platform/Base---memory/BaseR-Platform-memory-map Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com> [Andre: rebase and add Linux kernel header] Signed-off-by: Andre Przywara <andre.przywara@arm.com> [trini: Add MAINTAINERS entry for Peter]		2022-04-01 15:03:03 -04:00
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Kconfig	vexpress64: Add ARMv8R-64 board variant	2022-04-01 15:03:03 -04:00
lowlevel_init.S	vexpress64: Enable OF_CONTROL and OF_BOARD for VExpress64	2022-01-04 22:48:48 -05:00
MAINTAINERS	vexpress64: Add ARMv8R-64 board variant	2022-04-01 15:03:03 -04:00
Makefile	vexpress64: Enable OF_CONTROL and OF_BOARD for VExpress64	2022-01-04 22:48:48 -05:00
pcie.c	pci: Add defines for normal and subtractive PCI bridges	2022-03-25 13:35:50 -04:00
pcie.h	vexpress64: Juno: Add initialisation code for Juno R1 PCIe host bridge.	2015-10-19 17:05:46 -04:00
vexpress64.c	vexpress64: pick DRAM size from DT	2022-04-01 14:59:15 -04:00