mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-22 03:03:05 +00:00
7e1d32208e
Detect the SD/eMMC boot device at run-time. Load the environment from the boot deice, as well as save to it. Leave the environment offset the same as in the SPI flash. Make SD/eMMC 0 the default environment device when the boot device is not detected. Cc: Konstantin Porotchkin <kostap@marvell.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
124 lines
3.3 KiB
C
124 lines
3.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2016 Stefan Roese <sr@denx.de>
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*/
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#ifndef _CONFIG_MVEBU_ARMADA_8K_H
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#define _CONFIG_MVEBU_ARMADA_8K_H
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/*
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* High Level Configuration Options (easy to change)
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*/
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#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
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/* additions for new ARM relocation support */
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#define CONFIG_SYS_SDRAM_BASE 0x00000000
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/* auto boot */
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#define CONFIG_PREBOOT
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
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115200, 230400, 460800, 921600 }
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/*
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* For booting Linux, the board info and command line data
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* have to be in the first 8 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization.
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*/
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_INITRD_TAG /* enable INITRD tag */
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#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MiB for malloc() */
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/*
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* Other required minimal configurations
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*/
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#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
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#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
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#define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */
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#define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */
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#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
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#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
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/* End of 16M scrubbed by training in bootrom */
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000)
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/*
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* SPI Flash configuration
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*/
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#define CONFIG_ENV_SPI_BUS 0
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#define CONFIG_ENV_SPI_CS 0
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/* SPI NOR flash default params, used by sf commands */
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#define CONFIG_SF_DEFAULT_SPEED 1000000
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#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
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#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
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#define CONFIG_ENV_OFFSET 0x180000 /* as Marvell U-Boot version */
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#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
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#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */
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/* When runtime detection fails this is the default */
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_MAX_CHIPS 1
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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/*
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* Ethernet Driver configuration
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*/
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#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
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#define CONFIG_ARP_TIMEOUT 200
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#define CONFIG_NET_RETRY_COUNT 50
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#define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3)
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/* USB ethernet */
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/*
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* SATA/SCSI/AHCI configuration
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*/
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#define CONFIG_SCSI_AHCI_PLAT
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#define CONFIG_LBA48
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#define CONFIG_SYS_64BIT_LBA
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#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
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#define CONFIG_SYS_SCSI_MAX_LUN 1
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#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
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CONFIG_SYS_SCSI_MAX_LUN)
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/*
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* PCI configuration
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*/
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#ifdef CONFIG_PCIE_DW_MVEBU
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#define CONFIG_E1000
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#endif
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 1) \
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func(MMC, mmc, 0) \
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func(USB, usb, 0) \
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func(SCSI, scsi, 0) \
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func(PXE, pxe, na) \
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func(DHCP, dhcp, na)
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#include <config_distro_bootcmd.h>
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"scriptaddr=0x4d00000\0" \
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"pxefile_addr_r=0x4e00000\0" \
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"fdt_addr_r=0x4f00000\0" \
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"kernel_addr_r=0x5000000\0" \
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"ramdisk_addr_r=0x8000000\0" \
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"fdtfile=marvell/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
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BOOTENV
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#endif /* _CONFIG_MVEBU_ARMADA_8K_H */
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