mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-22 03:03:05 +00:00
a8ca5c8adb
The CONFIG_PHY_MARVELL has already been migrated to Kconfig (some boards already had it in their Kconfig), but had not been moved for older boards. Move it to the defconfigs for all boards. Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
207 lines
5.9 KiB
C
207 lines
5.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2014 Stefan Roese <sr@denx.de>
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* Copyright (C) 2016 Mario Six <mario.six@gdsys.cc>
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*/
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#ifndef _CONFIG_CONTROLCENTERDC_H
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#define _CONFIG_CONTROLCENTERDC_H
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/*
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* High Level Configuration Options (easy to change)
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*/
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#define CONFIG_CUSTOMER_BOARD_SUPPORT
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#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
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#define CONFIG_BOARD_LATE_INIT
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/*
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* TEXT_BASE needs to be below 16MiB, since this area is scrubbed
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* for DDR ECC byte filling in the SPL before loading the main
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* U-Boot into it.
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*/
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#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
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#define CONFIG_LOADADDR 1000000
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/*
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* Commands configuration
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*/
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#define CONFIG_CMD_I2C
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#define CONFIG_CMD_SPI
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/* SPI NOR flash default params, used by sf commands */
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#define CONFIG_SF_DEFAULT_BUS 1
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#define CONFIG_SF_DEFAULT_SPEED 1000000
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#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
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/*
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* SDIO/MMC Card Configuration
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*/
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#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
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/*
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* SATA/SCSI/AHCI configuration
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*/
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#define CONFIG_SCSI_AHCI_PLAT
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#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
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#define CONFIG_SYS_SCSI_MAX_LUN 1
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#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
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CONFIG_SYS_SCSI_MAX_LUN)
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/* USB/EHCI configuration */
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#define CONFIG_EHCI_IS_TDI
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/* Environment in SPI NOR flash */
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#define CONFIG_ENV_SPI_BUS 1
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#define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */
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#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
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#define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */
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#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
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/* PCIe support */
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_PCI
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#define CONFIG_PCI_MVEBU
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#define CONFIG_PCI_PNP
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#define CONFIG_PCI_SCAN_SHOW
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#endif
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/*
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* Software (bit-bang) MII driver configuration
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*/
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#define CONFIG_BITBANGMII /* bit-bang MII PHY management */
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#define CONFIG_BITBANGMII_MULTI
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/* SPL */
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/*
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* Select the boot device here
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*
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* Currently supported are:
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* SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
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* SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
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*/
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#define SPL_BOOT_SPI_NOR_FLASH 1
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#define SPL_BOOT_SDIO_MMC_CARD 2
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#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
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/* Defines for SPL */
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#define CONFIG_SPL_SIZE (160 << 10)
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#if defined(CONFIG_SECURED_MODE_IMAGE)
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#define CONFIG_SPL_TEXT_BASE 0x40002614
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#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x2614)
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#else
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#define CONFIG_SPL_TEXT_BASE 0x40000030
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#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x30)
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#endif
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#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
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#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SYS_MALLOC_SIMPLE
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#endif
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#define CONFIG_SPL_STACK (0x40000000 + ((212 - 16) << 10))
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#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_I2C_SUPPORT
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#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
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/* SPL related SPI defines */
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#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x30000
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#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
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#endif
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#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
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/* SPL related MMC defines */
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#define CONFIG_SPL_MMC_SUPPORT
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 1
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#define CONFIG_SYS_MMC_U_BOOT_OFFS (168 << 10)
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#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR (CONFIG_SYS_U_BOOT_OFFS / 512)
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
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#endif
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#endif
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/*
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* Environment Configuration
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*/
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_HOSTNAME "ccdc"
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#define CONFIG_ROOTPATH "/opt/nfsroot"
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#define CONFIG_BOOTFILE "ccdc.img"
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#define CONFIG_PREBOOT /* enable preboot variable */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"netdev=eth1\0" \
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"consoledev=ttyS1\0" \
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"u-boot=u-boot.bin\0" \
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"bootfile_addr=1000000\0" \
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"keyprogram_addr=3000000\0" \
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"keyprogram_file=keyprogram.img\0" \
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"fdtfile=controlcenterdc.dtb\0" \
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"load=tftpboot ${loadaddr} ${u-boot}\0" \
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"mmcdev=0:2\0" \
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"update=sf probe 1:0;" \
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" sf erase 0 +${filesize};" \
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" sf write ${fileaddr} 0 ${filesize}\0" \
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"upd=run load update\0" \
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"fdt_high=0x10000000\0" \
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"initrd_high=0x10000000\0" \
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"loadkeyprogram=tpm flush_keys;" \
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" mmc rescan;" \
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" ext4load mmc ${mmcdev} ${keyprogram_addr} ${keyprogram_file};"\
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" source ${keyprogram_addr}:script@1\0" \
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"gpio1=gpio@22_25\0" \
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"gpio2=A29\0" \
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"blinkseq='0 0 0 0 2 0 2 2 3 1 3 1 0 0 2 2 3 1 3 3 2 0 2 2 3 1 1 1 " \
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"2 0 2 2 3 1 3 1 0 0 2 0 3 3 3 1 2 0 0 0 3 1 1 1 0 0 0 0'\0" \
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"bootfail=for i in ${blinkseq}; do" \
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" if test $i -eq 0; then" \
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" gpio clear ${gpio1}; gpio set ${gpio2};" \
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" elif test $i -eq 1; then" \
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" gpio clear ${gpio1}; gpio clear ${gpio2};" \
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" elif test $i -eq 2; then" \
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" gpio set ${gpio1}; gpio set ${gpio2};" \
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" else;" \
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" gpio clear ${gpio1}; gpio set ${gpio2};" \
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" fi; sleep 0.12; done\0"
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#define CONFIG_NFSBOOTCOMMAND \
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"setenv bootargs root=/dev/nfs rw " \
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"nfsroot=${serverip}:${rootpath} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off " \
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"console=${consoledev},${baudrate} ${othbootargs}; " \
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"tftpboot ${bootfile_addr} ${bootfile}; " \
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"bootm ${bootfile_addr}"
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#define CONFIG_MMCBOOTCOMMAND \
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"setenv bootargs root=/dev/mmcblk0p3 rw rootwait " \
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"console=${consoledev},${baudrate} ${othbootargs}; " \
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"ext2load mmc 0:2 ${bootfile_addr} ${bootfile}; " \
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"bootm ${bootfile_addr}"
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#define CONFIG_BOOTCOMMAND \
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"if env exists keyprogram; then;" \
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" setenv keyprogram; run nfsboot;" \
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" fi;" \
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" run dobootfail"
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/*
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* mv-common.h should be defined after CMD configs since it used them
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* to enable certain macros
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*/
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#include "mv-common.h"
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#endif /* _CONFIG_CONTROLCENTERDC_H */
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