mirror of
https://github.com/AsahiLinux/u-boot
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65cc0e2a65
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
611 lines
15 KiB
ArmAsm
611 lines
15 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
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* Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
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*
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* Copyright 2010-2012 Freescale Semiconductor, Inc.
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*/
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#include <common.h>
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#include <asm-offsets.h>
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#include <config.h>
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#include <asm/cache.h>
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#define _START _start
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#define _FAULT _fault
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#define SAVE_ALL \
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move.w #0x2700,%sr; /* disable intrs */ \
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subl #60,%sp; /* space for 15 regs */ \
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moveml %d0-%d7/%a0-%a6,%sp@;
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#define RESTORE_ALL \
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moveml %sp@,%d0-%d7/%a0-%a6; \
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addl #60,%sp; /* space for 15 regs */ \
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rte;
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#if defined(CONFIG_SERIAL_BOOT)
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#define ASM_DRAMINIT (asm_dram_init - CONFIG_TEXT_BASE + \
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CFG_SYS_INIT_RAM_ADDR)
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#define ASM_DRAMINIT_N (asm_dram_init - CONFIG_TEXT_BASE)
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#define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_TEXT_BASE + \
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CFG_SYS_INIT_RAM_ADDR)
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#endif
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.text
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/*
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* Vector table. This is used for initial platform startup.
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* These vectors are to catch any un-intended traps.
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*/
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_vectors:
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#if defined(CONFIG_SERIAL_BOOT)
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INITSP: .long 0 /* Initial SP */
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#ifdef CONFIG_CF_SBF
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INITPC: .long ASM_DRAMINIT /* Initial PC */
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#endif
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#ifdef CONFIG_SYS_NAND_BOOT
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INITPC: .long ASM_DRAMINIT_N /* Initial PC */
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#endif
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#else
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INITSP: .long 0 /* Initial SP */
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INITPC: .long _START /* Initial PC */
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#endif
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vector02_0F:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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/* Reserved */
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vector10_17:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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vector18_1F:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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#if !defined(CONFIG_SERIAL_BOOT)
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/* TRAP #0 - #15 */
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vector20_2F:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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/* Reserved */
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vector30_3F:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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vector64_127:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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vector128_191:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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vector192_255:
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
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#endif
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#if defined(CONFIG_SERIAL_BOOT)
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/* Image header: chksum 4 bytes, len 4 bytes, img dest 4 bytes */
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asm_sbf_img_hdr:
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.long 0x00000000 /* checksum, not yet implemented */
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.long 0x00040000 /* image length */
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.long CONFIG_TEXT_BASE /* image to be relocated at */
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asm_dram_init:
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move.w #0x2700,%sr /* Mask off Interrupt */
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#ifdef CONFIG_SYS_NAND_BOOT
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/* for assembly stack */
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move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_CTRL), %d0
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movec %d0, %RAMBAR1
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move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_SP_OFFSET), %sp
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clr.l %sp@-
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#endif
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#ifdef CONFIG_CF_SBF
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move.l #CFG_SYS_INIT_RAM_ADDR, %d0
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movec %d0, %VBR
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move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_CTRL), %d0
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movec %d0, %RAMBAR1
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/* initialize general use internal ram */
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move.l #0, %d0
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move.l #(ICACHE_STATUS), %a1 /* icache */
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move.l #(DCACHE_STATUS), %a2 /* dcache */
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move.l %d0, (%a1)
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move.l %d0, (%a2)
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/* invalidate and disable cache */
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move.l #(CFG_SYS_ICACHE_INV + CFG_SYS_DCACHE_INV), %d0
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movec %d0, %CACR /* Invalidate cache */
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move.l #0, %d0
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movec %d0, %ACR0
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movec %d0, %ACR1
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movec %d0, %ACR2
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movec %d0, %ACR3
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move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_SP_OFFSET), %sp
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clr.l %sp@-
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#ifdef CFG_SYS_CS0_BASE
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/* Must disable global address */
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move.l #0xFC008000, %a1
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move.l #(CFG_SYS_CS0_BASE), (%a1)
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move.l #0xFC008008, %a1
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move.l #(CFG_SYS_CS0_CTRL), (%a1)
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move.l #0xFC008004, %a1
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move.l #(CFG_SYS_CS0_MASK), (%a1)
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#endif
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#endif /* CONFIG_CF_SBF */
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#ifdef CONFIG_MCF5441x
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/* TC: enable all peripherals,
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in the future only enable certain peripherals */
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move.l #0xFC04002D, %a1
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#if defined(CONFIG_CF_SBF)
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move.b #23, (%a1) /* dspi */
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#endif
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#endif /* CONFIG_MCF5441x */
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/* mandatory board level ddr-sdram init,
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* for both 5441x and 5445x
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*/
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bsr sbf_dram_init
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#ifdef CONFIG_CF_SBF
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/*
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* DSPI Initialization
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* a0 - general, sram - 0x80008000 - 32, see M54455EVB.h
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* a1 - dspi status
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* a2 - dtfr
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* a3 - drfr
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* a4 - Dst addr
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*/
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/* Enable pins for DSPI mode - chip-selects are enabled later */
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asm_dspi_init:
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#ifdef CONFIG_MCF5441x
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move.l #0xEC09404E, %a1
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move.l #0xEC09404F, %a2
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move.b #0xFF, (%a1)
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move.b #0x80, (%a2)
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#endif
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/* Configure DSPI module */
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move.l #0xFC05C000, %a0
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move.l #0x80FF0C00, (%a0) /* Master, clear TX/RX FIFO */
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move.l #0xFC05C00C, %a0
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#ifdef CONFIG_MCF5441x
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move.l #0x3E000016, (%a0)
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#endif
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move.l #0xFC05C034, %a2 /* dtfr */
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move.l #0xFC05C03B, %a3 /* drfr */
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move.l #(ASM_SBF_IMG_HDR + 4), %a1
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move.l (%a1)+, %d5
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move.l (%a1), %a4
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move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_SBFHDR_DATA_OFFSET), %a0
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move.l #(CFG_SYS_SBFHDR_SIZE), %d4
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move.l #0xFC05C02C, %a1 /* dspi status */
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/* Issue commands and address */
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move.l #0x8002000B, %d2 /* Fast Read Cmd */
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jsr asm_dspi_wr_status
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jsr asm_dspi_rd_status
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move.l #0x80020000, %d2 /* Address byte 2 */
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jsr asm_dspi_wr_status
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jsr asm_dspi_rd_status
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move.l #0x80020000, %d2 /* Address byte 1 */
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jsr asm_dspi_wr_status
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jsr asm_dspi_rd_status
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move.l #0x80020000, %d2 /* Address byte 0 */
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jsr asm_dspi_wr_status
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jsr asm_dspi_rd_status
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move.l #0x80020000, %d2 /* Dummy Wr and Rd */
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jsr asm_dspi_wr_status
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jsr asm_dspi_rd_status
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/* Transfer serial boot header to sram */
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asm_dspi_rd_loop1:
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move.l #0x80020000, %d2
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jsr asm_dspi_wr_status
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jsr asm_dspi_rd_status
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move.b %d1, (%a0) /* read, copy to dst */
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add.l #1, %a0 /* inc dst by 1 */
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sub.l #1, %d4 /* dec cnt by 1 */
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bne asm_dspi_rd_loop1
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/* Transfer u-boot from serial flash to memory */
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asm_dspi_rd_loop2:
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move.l #0x80020000, %d2
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jsr asm_dspi_wr_status
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jsr asm_dspi_rd_status
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move.b %d1, (%a4) /* read, copy to dst */
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add.l #1, %a4 /* inc dst by 1 */
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sub.l #1, %d5 /* dec cnt by 1 */
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bne asm_dspi_rd_loop2
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move.l #0x00020000, %d2 /* Terminate */
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jsr asm_dspi_wr_status
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jsr asm_dspi_rd_status
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/* jump to memory and execute */
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move.l #(CONFIG_TEXT_BASE + 0x400), %a0
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jmp (%a0)
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asm_dspi_wr_status:
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move.l (%a1), %d0 /* status */
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and.l #0x0000F000, %d0
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cmp.l #0x00003000, %d0
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bgt asm_dspi_wr_status
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move.l %d2, (%a2)
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rts
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asm_dspi_rd_status:
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move.l (%a1), %d0 /* status */
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and.l #0x000000F0, %d0
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lsr.l #4, %d0
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cmp.l #0, %d0
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beq asm_dspi_rd_status
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move.b (%a3), %d1
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rts
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#endif /* CONFIG_CF_SBF */
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#ifdef CONFIG_SYS_NAND_BOOT
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/* copy 4 boot pages to dram as soon as possible */
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/* each page is 996 bytes (1056 total with 60 ECC bytes */
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move.l #0x00000000, %a1 /* src */
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move.l #CONFIG_TEXT_BASE, %a2 /* dst */
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move.l #0x3E0, %d0 /* sz in long */
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asm_boot_nand_copy:
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move.l (%a1)+, (%a2)+
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subq.l #1, %d0
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bne asm_boot_nand_copy
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/* jump to memory and execute */
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move.l #(asm_nand_init), %a0
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jmp (%a0)
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asm_nand_init:
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/* exit nand boot-mode */
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move.l #0xFC0FFF30, %a1
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or.l #0x00000040, %d1
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move.l %d1, (%a1)
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/* initialize general use internal ram */
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move.l #0, %d0
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move.l #(CACR_STATUS), %a1 /* CACR */
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move.l #(ICACHE_STATUS), %a2 /* icache */
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move.l #(DCACHE_STATUS), %a3 /* dcache */
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move.l %d0, (%a1)
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move.l %d0, (%a2)
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move.l %d0, (%a3)
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/* invalidate and disable cache */
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move.l #0x01004100, %d0 /* Invalidate cache cmd */
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movec %d0, %CACR /* Invalidate cache */
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move.l #0, %d0
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movec %d0, %ACR0
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movec %d0, %ACR1
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movec %d0, %ACR2
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movec %d0, %ACR3
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#ifdef CFG_SYS_CS0_BASE
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/* Must disable global address */
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move.l #0xFC008000, %a1
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move.l #(CFG_SYS_CS0_BASE), (%a1)
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move.l #0xFC008008, %a1
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move.l #(CFG_SYS_CS0_CTRL), (%a1)
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move.l #0xFC008004, %a1
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move.l #(CFG_SYS_CS0_MASK), (%a1)
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#endif
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/* NAND port configuration */
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move.l #0xEC094048, %a1
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move.b #0xFD, (%a1)+
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move.b #0x5F, (%a1)+
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move.b #0x04, (%a1)+
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/* reset nand */
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move.l #0xFC0FFF38, %a1 /* isr */
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move.l #0x000e0000, (%a1)
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move.l #0xFC0FFF08, %a2
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move.l #0x00000000, (%a2)+ /* car */
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move.l #0x11000000, (%a2)+ /* rar */
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move.l #0x00000000, (%a2)+ /* rpt */
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move.l #0x00000000, (%a2)+ /* rai */
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move.l #0xFC0FFF2c, %a2 /* cfg */
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move.l #0x00000000, (%a2)+ /* secsz */
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move.l #0x000e0681, (%a2)+
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move.l #0xFC0FFF04, %a2 /* cmd2 */
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move.l #0xFF404001, (%a2)
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move.l #0x000e0000, (%a1)
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move.l #0x2000, %d1
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bsr asm_delay
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/* setup nand */
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move.l #0xFC0FFF00, %a1
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move.l #0x30700000, (%a1)+ /* cmd1 */
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move.l #0x007EF000, (%a1)+ /* cmd2 */
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move.l #0xFC0FFF2C, %a1
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move.l #0x00000841, (%a1)+ /* secsz */
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move.l #0x000e0681, (%a1)+ /* cfg */
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move.l #100, %d4 /* 100 pages ~200KB */
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move.l #4, %d2 /* start at 4 */
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move.l #0xFC0FFF04, %a0 /* cmd2 */
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move.l #0xFC0FFF0C, %a1 /* rar */
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move.l #(CONFIG_TEXT_BASE + 0xF80), %a2
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asm_nand_read:
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move.l #0x11000000, %d0 /* rar */
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or.l %d2, %d0
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move.l %d0, (%a1)
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add.l #1, %d2
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move.l (%a0), %d0 /* cmd2 */
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or.l #1, %d0
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move.l %d0, (%a0)
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move.l #0x200, %d1
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bsr asm_delay
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asm_nand_chk_status:
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move.l #0xFC0FFF38, %a4 /* isr */
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move.l (%a4), %d0
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and.l #0x40000000, %d0
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tst.l %d0
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beq asm_nand_chk_status
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move.l #0xFC0FFF38, %a4 /* isr */
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move.l (%a4), %d0
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or.l #0x000E0000, %d0
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move.l %d0, (%a4)
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move.l #0x200, %d3
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move.l #0xFC0FC000, %a3 /* buf 1 */
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asm_nand_copy:
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move.l (%a3)+, (%a2)+
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subq.l #1, %d3
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bgt asm_nand_copy
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subq.l #1, %d4
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bgt asm_nand_read
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/* jump to memory and execute */
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move.l #(CONFIG_TEXT_BASE + 0x400), %a0
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jmp (%a0)
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#endif /* CONFIG_SYS_NAND_BOOT */
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.globl asm_delay
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asm_delay:
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nop
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subq.l #1, %d1
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bne asm_delay
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rts
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#endif /* CONFIG_CF_SBF || CONFIG_NAND_U_BOOT */
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.text
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. = 0x400
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.globl _start
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_start:
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#if !defined(CONFIG_SERIAL_BOOT)
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nop
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nop
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move.w #0x2700,%sr /* Mask off Interrupt */
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/* Set vector base register at the beginning of the Flash */
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move.l #CFG_SYS_FLASH_BASE, %d0
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movec %d0, %VBR
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move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_CTRL), %d0
|
|
movec %d0, %RAMBAR1
|
|
|
|
/* initialize general use internal ram */
|
|
move.l #0, %d0
|
|
move.l #(ICACHE_STATUS), %a1 /* icache */
|
|
move.l #(DCACHE_STATUS), %a2 /* dcache */
|
|
move.l %d0, (%a1)
|
|
move.l %d0, (%a2)
|
|
|
|
/* invalidate and disable cache */
|
|
move.l #(CFG_SYS_ICACHE_INV + CFG_SYS_DCACHE_INV), %d0
|
|
movec %d0, %CACR /* Invalidate cache */
|
|
move.l #0, %d0
|
|
movec %d0, %ACR0
|
|
movec %d0, %ACR1
|
|
movec %d0, %ACR2
|
|
movec %d0, %ACR3
|
|
#else
|
|
move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_CTRL), %d0
|
|
movec %d0, %RAMBAR1
|
|
#endif
|
|
|
|
/* put relocation table address to a5 */
|
|
move.l #__got_start, %a5
|
|
|
|
/* setup stack initially on top of internal static ram */
|
|
move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_SIZE), %sp
|
|
|
|
/*
|
|
* if configured, malloc_f arena will be reserved first,
|
|
* then (and always) gd struct space will be reserved
|
|
*/
|
|
move.l %sp, -(%sp)
|
|
move.l #board_init_f_alloc_reserve, %a1
|
|
jsr (%a1)
|
|
|
|
/* update stack and frame-pointers */
|
|
move.l %d0, %sp
|
|
move.l %sp, %fp
|
|
|
|
/* initialize reserved area */
|
|
move.l %d0, -(%sp)
|
|
move.l #board_init_f_init_reserve, %a1
|
|
jsr (%a1)
|
|
|
|
/* run low-level CPU init code (from flash) */
|
|
move.l #cpu_init_f, %a1
|
|
jsr (%a1)
|
|
|
|
/* run low-level board init code (from flash) */
|
|
clr.l %sp@-
|
|
move.l #board_init_f, %a1
|
|
jsr (%a1)
|
|
|
|
/* board_init_f() does not return */
|
|
|
|
/******************************************************************************/
|
|
|
|
/*
|
|
* void relocate_code(addr_sp, gd, addr_moni)
|
|
*
|
|
* This "function" does not return, instead it continues in RAM
|
|
* after relocating the monitor code.
|
|
*
|
|
* r3 = dest
|
|
* r4 = src
|
|
* r5 = length in bytes
|
|
* r6 = cachelinesize
|
|
*/
|
|
.globl relocate_code
|
|
relocate_code:
|
|
link.w %a6,#0
|
|
move.l 8(%a6), %sp /* set new stack pointer */
|
|
|
|
move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
|
|
move.l 16(%a6), %a0 /* Save copy of Destination Address */
|
|
|
|
move.l #CONFIG_SYS_MONITOR_BASE, %a1
|
|
move.l #__init_end, %a2
|
|
move.l %a0, %a3
|
|
|
|
/* copy the code to RAM */
|
|
1:
|
|
move.l (%a1)+, (%a3)+
|
|
cmp.l %a1,%a2
|
|
bgt.s 1b
|
|
|
|
/*
|
|
* We are done. Do not return, instead branch to second part of board
|
|
* initialization, now running from RAM.
|
|
*/
|
|
move.l %a0, %a1
|
|
add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
|
|
jmp (%a1)
|
|
|
|
in_ram:
|
|
|
|
clear_bss:
|
|
/*
|
|
* Now clear BSS segment
|
|
*/
|
|
move.l %a0, %a1
|
|
add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
|
|
move.l %a0, %d1
|
|
add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
|
|
6:
|
|
clr.l (%a1)+
|
|
cmp.l %a1,%d1
|
|
bgt.s 6b
|
|
|
|
/*
|
|
* fix got table in RAM
|
|
*/
|
|
move.l %a0, %a1
|
|
add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
|
|
move.l %a1,%a5 /* fix got pointer register a5 */
|
|
|
|
move.l %a0, %a2
|
|
add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
|
|
|
|
7:
|
|
move.l (%a1),%d1
|
|
sub.l #_start,%d1
|
|
add.l %a0,%d1
|
|
move.l %d1,(%a1)+
|
|
cmp.l %a2, %a1
|
|
bne 7b
|
|
|
|
/* calculate relative jump to board_init_r in ram */
|
|
move.l %a0, %a1
|
|
add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
|
|
|
|
/* set parameters for board_init_r */
|
|
move.l %a0,-(%sp) /* dest_addr */
|
|
move.l %d0,-(%sp) /* gd */
|
|
jsr (%a1)
|
|
|
|
/******************************************************************************/
|
|
|
|
/* exception code */
|
|
.globl _fault
|
|
_fault:
|
|
bra _fault
|
|
|
|
.globl _exc_handler
|
|
_exc_handler:
|
|
SAVE_ALL
|
|
movel %sp,%sp@-
|
|
bsr exc_handler
|
|
addql #4,%sp
|
|
RESTORE_ALL
|
|
|
|
.globl _int_handler
|
|
_int_handler:
|
|
SAVE_ALL
|
|
movel %sp,%sp@-
|
|
bsr int_handler
|
|
addql #4,%sp
|
|
RESTORE_ALL
|
|
|
|
/******************************************************************************/
|
|
|
|
.align 4
|