mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-21 10:43:06 +00:00
8b956bdddd
To fit the DBD_EN fused part, we re-design the TRDC and XRDC assignment. M33 will be the TRDC owner and needs to configure TRDC. A35 is the XRDC owner, ATF will configure XRDC. The handshake between U-boot and M33 image is used to sync TRDC and XRDC configuration completion. Once the handshake is done, A35 and M33 can access the allowed resources in others domain. The handshake is needed when M33 is booted or DBD_EN fused, because both cases will enable the TRDC. If handshake is timeout, the boot will hang. We use SIM GPR0 to pass the info from SPL to u-boot, because before the handshake, u-boot can't access SEC SIM and FSB. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com>
20 lines
532 B
C
20 lines
532 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
/*
|
|
* Copyright 2021 NXP
|
|
*/
|
|
|
|
#ifndef __ARCH_IMX8ULP_SYS_PROTO_H
|
|
#define __ARCH_NMX8ULP_SYS_PROTO_H
|
|
|
|
#include <asm/mach-imx/sys_proto.h>
|
|
|
|
enum bt_mode get_boot_mode(void);
|
|
int xrdc_config_pdac(u32 bridge, u32 index, u32 dom, u32 perm);
|
|
int xrdc_config_pdac_openacc(u32 bridge, u32 index);
|
|
void set_lpav_qos(void);
|
|
void load_lposc_fuse(void);
|
|
bool m33_image_booted(void);
|
|
bool is_m33_handshake_necessary(void);
|
|
int m33_image_handshake(ulong timeout_ms);
|
|
int imx8ulp_dm_post_init(void);
|
|
#endif
|