mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-19 03:08:31 +00:00
0a2be69fbf
Add the core architecture code for the rk3188. It doesn't support the SPL yet, as because of some unknown error it doesn't start yet. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Kever Yang <kever.yang@rock-chips.com> Drop these defines from rk3188_common.h CONFIG_GENERIC_MMC, CONFIG_BOUNCE_BUFFER, CONFIG_DOS_PARTITION CONFIG_PARTITION_UUIDS, CONFIG_CMD_PART: Signed-off-by: Simon Glass <sjg@chromium.org>
33 lines
597 B
C
33 lines
597 B
C
/*
|
|
* Copyright (C) 2015 Google, Inc
|
|
* Written by Simon Glass <sjg@chromium.org>
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <dm.h>
|
|
#include <syscon.h>
|
|
#include <asm/arch/clock.h>
|
|
#include <asm/arch/cru_rk3188.h>
|
|
|
|
int rockchip_get_clk(struct udevice **devp)
|
|
{
|
|
return uclass_get_device_by_driver(UCLASS_CLK,
|
|
DM_GET_DRIVER(rockchip_rk3188_cru), devp);
|
|
}
|
|
|
|
void *rockchip_get_cru(void)
|
|
{
|
|
struct rk3188_clk_priv *priv;
|
|
struct udevice *dev;
|
|
int ret;
|
|
|
|
ret = rockchip_get_clk(&dev);
|
|
if (ret)
|
|
return ERR_PTR(ret);
|
|
|
|
priv = dev_get_priv(dev);
|
|
|
|
return priv->cru;
|
|
}
|