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https://github.com/AsahiLinux/u-boot
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c859f2a77d
Restructure the SPL so each devices such as CV, A10 and S10 will have their own dedicated SPL file. SPL file determine the HW initialization flow which is device specific Signed-off-by: Chin Liang See <chin.liang.see@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
60 lines
1.5 KiB
Makefile
60 lines
1.5 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0+
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#
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# (C) Copyright 2000-2003
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
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obj-y += board.o
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obj-y += clock_manager.o
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obj-y += misc.o
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obj-y += reset_manager.o
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obj-y += timer.o
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ifdef CONFIG_TARGET_SOCFPGA_GEN5
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obj-y += clock_manager_gen5.o
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obj-y += misc_gen5.o
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obj-y += reset_manager_gen5.o
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obj-y += scan_manager.o
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obj-y += system_manager_gen5.o
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obj-y += wrap_pll_config.o
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obj-y += fpga_manager.o
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endif
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ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
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obj-y += clock_manager_arria10.o
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obj-y += misc_arria10.o
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obj-y += pinmux_arria10.o
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obj-y += reset_manager_arria10.o
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endif
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ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
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obj-y += clock_manager_s10.o
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obj-y += mailbox_s10.o
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obj-y += misc_s10.o
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obj-y += mmu-arm64_s10.o
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obj-y += reset_manager_s10.o
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obj-y += system_manager_s10.o
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obj-y += wrap_pinmux_config_s10.o
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obj-y += wrap_pll_config_s10.o
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endif
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ifdef CONFIG_SPL_BUILD
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ifdef CONFIG_TARGET_SOCFPGA_GEN5
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obj-y += spl_gen5.o
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obj-y += freeze_controller.o
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obj-y += wrap_iocsr_config.o
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obj-y += wrap_pinmux_config.o
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obj-y += wrap_sdram_config.o
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endif
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ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
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obj-y += spl_a10.o
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endif
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endif
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ifdef CONFIG_TARGET_SOCFPGA_GEN5
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# QTS-generated config file wrappers
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CFLAGS_wrap_iocsr_config.o += -I$(srctree)/board/$(BOARDDIR)
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CFLAGS_wrap_pinmux_config.o += -I$(srctree)/board/$(BOARDDIR)
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CFLAGS_wrap_pll_config.o += -I$(srctree)/board/$(BOARDDIR)
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CFLAGS_wrap_sdram_config.o += -I$(srctree)/board/$(BOARDDIR)
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endif
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