mirror of
https://github.com/AsahiLinux/u-boot
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c1cfd51907
Add support for 4 1.62G lane eDP panels connected via an anx9804 bridge, such as found on the Colombus devkit. While at it also fix the wrong indentation of the SSD2828 Kconfig help text in board/sunxi/Kconfig. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
564 lines
16 KiB
Text
564 lines
16 KiB
Text
if ARCH_SUNXI
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# Note only one of these may be selected at a time! But hidden choices are
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# not supported by Kconfig
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config SUNXI_GEN_SUN4I
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bool
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---help---
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Select this for sunxi SoCs which have resets and clocks set up
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as the original A10 (mach-sun4i).
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config SUNXI_GEN_SUN6I
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bool
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---help---
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Select this for sunxi SoCs which have sun6i like periphery, like
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separate ahb reset control registers, custom pmic bus, new style
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watchdog, etc.
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choice
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prompt "Sunxi SoC Variant"
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optional
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config MACH_SUN4I
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bool "sun4i (Allwinner A10)"
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select CPU_V7
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select SUNXI_GEN_SUN4I
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select SUPPORT_SPL
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config MACH_SUN5I
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bool "sun5i (Allwinner A13)"
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select CPU_V7
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select SUNXI_GEN_SUN4I
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select SUPPORT_SPL
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config MACH_SUN6I
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bool "sun6i (Allwinner A31)"
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select CPU_V7
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select CPU_V7_HAS_NONSEC
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select CPU_V7_HAS_VIRT
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select SUNXI_GEN_SUN6I
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select SUPPORT_SPL
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select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
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config MACH_SUN7I
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bool "sun7i (Allwinner A20)"
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select CPU_V7
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select CPU_V7_HAS_NONSEC
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select CPU_V7_HAS_VIRT
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select SUNXI_GEN_SUN4I
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select SUPPORT_SPL
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select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
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config MACH_SUN8I_A23
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bool "sun8i (Allwinner A23)"
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select CPU_V7
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select CPU_V7_HAS_NONSEC
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select CPU_V7_HAS_VIRT
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select SUNXI_GEN_SUN6I
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select SUPPORT_SPL
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select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
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config MACH_SUN8I_A33
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bool "sun8i (Allwinner A33)"
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select CPU_V7
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select CPU_V7_HAS_NONSEC
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select CPU_V7_HAS_VIRT
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select SUNXI_GEN_SUN6I
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select SUPPORT_SPL
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select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
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config MACH_SUN9I
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bool "sun9i (Allwinner A80)"
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select CPU_V7
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select SUNXI_GEN_SUN6I
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endchoice
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# The sun8i SoCs share a lot, this helps to avoid a lot of "if A23 || A33"
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config MACH_SUN8I
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bool
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default y if MACH_SUN8I_A23 || MACH_SUN8I_A33
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config DRAM_CLK
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int "sunxi dram clock speed"
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default 312 if MACH_SUN6I || MACH_SUN8I
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default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
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---help---
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Set the dram clock speed, valid range 240 - 480, must be a multiple
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of 24.
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if MACH_SUN5I || MACH_SUN7I
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config DRAM_MBUS_CLK
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int "sunxi mbus clock speed"
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default 300
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---help---
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Set the mbus clock speed. The maximum on sun5i hardware is 300MHz.
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endif
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config DRAM_ZQ
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int "sunxi dram zq value"
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default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
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default 127 if MACH_SUN7I
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---help---
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Set the dram zq value.
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config DRAM_ODT_EN
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bool "sunxi dram odt enable"
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default n if !MACH_SUN8I_A23
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default y if MACH_SUN8I_A23
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---help---
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Select this to enable dram odt (on die termination).
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if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
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config DRAM_EMR1
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int "sunxi dram emr1 value"
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default 0 if MACH_SUN4I
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default 4 if MACH_SUN5I || MACH_SUN7I
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---help---
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Set the dram controller emr1 value.
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config DRAM_TPR3
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hex "sunxi dram tpr3 value"
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default 0
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---help---
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Set the dram controller tpr3 parameter. This parameter configures
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the delay on the command lane and also phase shifts, which are
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applied for sampling incoming read data. The default value 0
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means that no phase/delay adjustments are necessary. Properly
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configuring this parameter increases reliability at high DRAM
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clock speeds.
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config DRAM_DQS_GATING_DELAY
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hex "sunxi dram dqs_gating_delay value"
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default 0
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---help---
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Set the dram controller dqs_gating_delay parmeter. Each byte
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encodes the DQS gating delay for each byte lane. The delay
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granularity is 1/4 cycle. For example, the value 0x05060606
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means that the delay is 5 quarter-cycles for one lane (1.25
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cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
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The default value 0 means autodetection. The results of hardware
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autodetection are not very reliable and depend on the chip
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temperature (sometimes producing different results on cold start
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and warm reboot). But the accuracy of hardware autodetection
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is usually good enough, unless running at really high DRAM
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clocks speeds (up to 600MHz). If unsure, keep as 0.
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choice
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prompt "sunxi dram timings"
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default DRAM_TIMINGS_VENDOR_MAGIC
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---help---
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Select the timings of the DDR3 chips.
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config DRAM_TIMINGS_VENDOR_MAGIC
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bool "Magic vendor timings from Android"
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---help---
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The same DRAM timings as in the Allwinner boot0 bootloader.
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config DRAM_TIMINGS_DDR3_1066F_1333H
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bool "JEDEC DDR3-1333H with down binning to DDR3-1066F"
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---help---
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Use the timings of the standard JEDEC DDR3-1066F speed bin for
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DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
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for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips
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used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
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or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
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that down binning to DDR3-1066F is supported (because DDR3-1066F
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uses a bit faster timings than DDR3-1333H).
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config DRAM_TIMINGS_DDR3_800E_1066G_1333J
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bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J"
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---help---
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Use the timings of the slowest possible JEDEC speed bin for the
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selected DRAM_CLK. Depending on the DRAM_CLK value, it may be
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DDR3-800E, DDR3-1066G or DDR3-1333J.
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endchoice
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endif
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if MACH_SUN8I_A23
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config DRAM_ODT_CORRECTION
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int "sunxi dram odt correction value"
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default 0
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---help---
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Set the dram odt correction value (range -255 - 255). In allwinner
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fex files, this option is found in bits 8-15 of the u32 odt_en variable
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in the [dram] section. When bit 31 of the odt_en variable is set
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then the correction is negative. Usually the value for this is 0.
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endif
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config SYS_CLK_FREQ
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default 912000000 if MACH_SUN7I
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default 1008000000 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
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config SYS_CONFIG_NAME
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default "sun4i" if MACH_SUN4I
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default "sun5i" if MACH_SUN5I
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default "sun6i" if MACH_SUN6I
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default "sun7i" if MACH_SUN7I
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default "sun8i" if MACH_SUN8I
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default "sun9i" if MACH_SUN9I
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config SYS_BOARD
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default "sunxi"
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config SYS_SOC
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default "sunxi"
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config UART0_PORT_F
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bool "UART0 on MicroSD breakout board"
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default n
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---help---
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Repurpose the SD card slot for getting access to the UART0 serial
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console. Primarily useful only for low level u-boot debugging on
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tablets, where normal UART0 is difficult to access and requires
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device disassembly and/or soldering. As the SD card can't be used
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at the same time, the system can be only booted in the FEL mode.
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Only enable this if you really know what you are doing.
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config OLD_SUNXI_KERNEL_COMPAT
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boolean "Enable workarounds for booting old kernels"
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default n
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---help---
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Set this to enable various workarounds for old kernels, this results in
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sub-optimal settings for newer kernels, only enable if needed.
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config MMC0_CD_PIN
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string "Card detect pin for mmc0"
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default ""
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---help---
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Set the card detect pin for mmc0, leave empty to not use cd. This
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takes a string in the format understood by sunxi_name_to_gpio, e.g.
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PH1 for pin 1 of port H.
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config MMC1_CD_PIN
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string "Card detect pin for mmc1"
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default ""
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---help---
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See MMC0_CD_PIN help text.
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config MMC2_CD_PIN
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string "Card detect pin for mmc2"
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default ""
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---help---
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See MMC0_CD_PIN help text.
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config MMC3_CD_PIN
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string "Card detect pin for mmc3"
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default ""
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---help---
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See MMC0_CD_PIN help text.
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config MMC1_PINS
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string "Pins for mmc1"
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default ""
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---help---
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Set the pins used for mmc1, when applicable. This takes a string in the
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format understood by sunxi_name_to_gpio_bank, e.g. PH for port H.
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config MMC2_PINS
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string "Pins for mmc2"
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default ""
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---help---
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See MMC1_PINS help text.
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config MMC3_PINS
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string "Pins for mmc3"
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default ""
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---help---
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See MMC1_PINS help text.
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config MMC_SUNXI_SLOT_EXTRA
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int "mmc extra slot number"
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default -1
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---help---
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sunxi builds always enable mmc0, some boards also have a second sdcard
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slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
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support for this.
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config USB0_VBUS_PIN
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string "Vbus enable pin for usb0 (otg)"
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default ""
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---help---
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Set the Vbus enable pin for usb0 (otg). This takes a string in the
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format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
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config USB0_VBUS_DET
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string "Vbus detect pin for usb0 (otg)"
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default ""
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---help---
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Set the Vbus detect pin for usb0 (otg). This takes a string in the
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format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
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config USB0_ID_DET
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string "ID detect pin for usb0 (otg)"
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default ""
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---help---
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Set the ID detect pin for usb0 (otg). This takes a string in the
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format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
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config USB1_VBUS_PIN
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string "Vbus enable pin for usb1 (ehci0)"
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default "PH6" if MACH_SUN4I || MACH_SUN7I
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default "PH27" if MACH_SUN6I
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---help---
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Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes
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a string in the format understood by sunxi_name_to_gpio, e.g.
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PH1 for pin 1 of port H.
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config USB2_VBUS_PIN
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string "Vbus enable pin for usb2 (ehci1)"
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default "PH3" if MACH_SUN4I || MACH_SUN7I
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default "PH24" if MACH_SUN6I
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---help---
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See USB1_VBUS_PIN help text.
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config I2C0_ENABLE
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bool "Enable I2C/TWI controller 0"
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default y if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
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default n if MACH_SUN6I || MACH_SUN8I
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---help---
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This allows enabling I2C/TWI controller 0 by muxing its pins, enabling
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its clock and setting up the bus. This is especially useful on devices
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with slaves connected to the bus or with pins exposed through e.g. an
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expansion port/header.
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config I2C1_ENABLE
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bool "Enable I2C/TWI controller 1"
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default n
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---help---
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See I2C0_ENABLE help text.
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config I2C2_ENABLE
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bool "Enable I2C/TWI controller 2"
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default n
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---help---
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See I2C0_ENABLE help text.
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if MACH_SUN6I || MACH_SUN7I
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config I2C3_ENABLE
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bool "Enable I2C/TWI controller 3"
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default n
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---help---
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See I2C0_ENABLE help text.
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endif
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if MACH_SUN7I
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config I2C4_ENABLE
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bool "Enable I2C/TWI controller 4"
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default n
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---help---
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See I2C0_ENABLE help text.
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endif
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config AXP_GPIO
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boolean "Enable support for gpio-s on axp PMICs"
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default n
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---help---
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Say Y here to enable support for the gpio pins of the axp PMIC ICs.
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config VIDEO
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boolean "Enable graphical uboot console on HDMI, LCD or VGA"
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default y
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---help---
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Say Y here to add support for using a cfb console on the HDMI, LCD
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or VGA output found on most sunxi devices. See doc/README.video for
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info on how to select the video output and mode.
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config VIDEO_HDMI
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boolean "HDMI output support"
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depends on VIDEO && !MACH_SUN8I
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default y
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---help---
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Say Y here to add support for outputting video over HDMI.
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config VIDEO_VGA
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boolean "VGA output support"
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depends on VIDEO && (MACH_SUN4I || MACH_SUN7I)
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default n
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---help---
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Say Y here to add support for outputting video over VGA.
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config VIDEO_VGA_VIA_LCD
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boolean "VGA via LCD controller support"
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depends on VIDEO && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I)
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default n
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---help---
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Say Y here to add support for external DACs connected to the parallel
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LCD interface driving a VGA connector, such as found on the
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Olimex A13 boards.
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config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
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boolean "Force sync active high for VGA via LCD controller support"
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depends on VIDEO_VGA_VIA_LCD
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default n
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---help---
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Say Y here if you've a board which uses opendrain drivers for the vga
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hsync and vsync signals. Opendrain drivers cannot generate steep enough
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positive edges for a stable video output, so on boards with opendrain
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drivers the sync signals must always be active high.
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config VIDEO_VGA_EXTERNAL_DAC_EN
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string "LCD panel power enable pin"
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depends on VIDEO_VGA_VIA_LCD
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default ""
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---help---
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Set the enable pin for the external VGA DAC. This takes a string in the
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format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
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config VIDEO_COMPOSITE
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boolean "Composite video output support"
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depends on VIDEO && (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
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default n
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---help---
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Say Y here to add support for outputting composite video.
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config VIDEO_LCD_MODE
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string "LCD panel timing details"
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depends on VIDEO
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default ""
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---help---
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LCD panel timing details string, leave empty if there is no LCD panel.
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This is in drivers/video/videomodes.c: video_get_params() format, e.g.
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x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0
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config VIDEO_LCD_DCLK_PHASE
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int "LCD panel display clock phase"
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depends on VIDEO
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default 1
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---help---
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Select LCD panel display clock phase shift, range 0-3.
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config VIDEO_LCD_POWER
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string "LCD panel power enable pin"
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depends on VIDEO
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default ""
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---help---
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Set the power enable pin for the LCD panel. This takes a string in the
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format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
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config VIDEO_LCD_RESET
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string "LCD panel reset pin"
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depends on VIDEO
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default ""
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---help---
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Set the reset pin for the LCD panel. This takes a string in the format
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understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
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config VIDEO_LCD_BL_EN
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string "LCD panel backlight enable pin"
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depends on VIDEO
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default ""
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---help---
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Set the backlight enable pin for the LCD panel. This takes a string in the
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the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
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port H.
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config VIDEO_LCD_BL_PWM
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string "LCD panel backlight pwm pin"
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depends on VIDEO
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default ""
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---help---
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Set the backlight pwm pin for the LCD panel. This takes a string in the
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format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
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config VIDEO_LCD_BL_PWM_ACTIVE_LOW
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bool "LCD panel backlight pwm is inverted"
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depends on VIDEO
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default y
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---help---
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Set this if the backlight pwm output is active low.
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config VIDEO_LCD_PANEL_I2C
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bool "LCD panel needs to be configured via i2c"
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depends on VIDEO
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default n
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---help---
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Say y here if the LCD panel needs to be configured via i2c. This
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will add a bitbang i2c controller using gpios to talk to the LCD.
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config VIDEO_LCD_PANEL_I2C_SDA
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string "LCD panel i2c interface SDA pin"
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|
depends on VIDEO_LCD_PANEL_I2C
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default "PG12"
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---help---
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|
Set the SDA pin for the LCD i2c interface. This takes a string in the
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|
format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
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|
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config VIDEO_LCD_PANEL_I2C_SCL
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string "LCD panel i2c interface SCL pin"
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|
depends on VIDEO_LCD_PANEL_I2C
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|
default "PG10"
|
|
---help---
|
|
Set the SCL pin for the LCD i2c interface. This takes a string in the
|
|
format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
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|
|
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|
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# Note only one of these may be selected at a time! But hidden choices are
|
|
# not supported by Kconfig
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|
config VIDEO_LCD_IF_PARALLEL
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|
bool
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|
|
|
config VIDEO_LCD_IF_LVDS
|
|
bool
|
|
|
|
|
|
choice
|
|
prompt "LCD panel support"
|
|
depends on VIDEO
|
|
---help---
|
|
Select which type of LCD panel to support.
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|
|
|
config VIDEO_LCD_PANEL_PARALLEL
|
|
bool "Generic parallel interface LCD panel"
|
|
select VIDEO_LCD_IF_PARALLEL
|
|
|
|
config VIDEO_LCD_PANEL_LVDS
|
|
bool "Generic lvds interface LCD panel"
|
|
select VIDEO_LCD_IF_LVDS
|
|
|
|
config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828
|
|
bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip"
|
|
select VIDEO_LCD_SSD2828
|
|
select VIDEO_LCD_IF_PARALLEL
|
|
---help---
|
|
7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
|
|
|
|
config VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804
|
|
bool "eDP 4-lane, 1.62G LCD panel via ANX9804 bridge chip"
|
|
select VIDEO_LCD_ANX9804
|
|
select VIDEO_LCD_IF_PARALLEL
|
|
select VIDEO_LCD_PANEL_I2C
|
|
---help---
|
|
Select this for eDP LCD panels with 4 lanes running at 1.62G,
|
|
connected via an ANX9804 bridge chip.
|
|
|
|
config VIDEO_LCD_PANEL_HITACHI_TX18D42VM
|
|
bool "Hitachi tx18d42vm LCD panel"
|
|
select VIDEO_LCD_HITACHI_TX18D42VM
|
|
select VIDEO_LCD_IF_LVDS
|
|
---help---
|
|
7.85" 1024x768 Hitachi tx18d42vm LCD panel support
|
|
|
|
config VIDEO_LCD_TL059WV5C0
|
|
bool "tl059wv5c0 LCD panel"
|
|
select VIDEO_LCD_PANEL_I2C
|
|
select VIDEO_LCD_IF_PARALLEL
|
|
---help---
|
|
6" 480x800 tl059wv5c0 panel support, as used on the Utoo P66 and
|
|
Aigo M60/M608/M606 tablets.
|
|
|
|
endchoice
|
|
|
|
|
|
config GMAC_TX_DELAY
|
|
int "GMAC Transmit Clock Delay Chain"
|
|
default 0
|
|
---help---
|
|
Set the GMAC Transmit Clock Delay Chain value.
|
|
|
|
endif
|