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https://github.com/AsahiLinux/u-boot
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d710c7e841
dev_read_addr() returns a value of type fdt_addr_t which is a 64-bit address and plat->base is a pointer. In a 32-bit build, this causes the following warning seen when building sifive-gpio.c: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] Change to use dev_read_addr_ptr(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
176 lines
4.3 KiB
C
176 lines
4.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* SiFive GPIO driver
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*
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* Copyright (C) 2019 SiFive, Inc.
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*/
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#include <common.h>
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#include <dm.h>
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#include <asm/arch/gpio.h>
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#include <asm/io.h>
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#include <errno.h>
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#include <asm/gpio.h>
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#include <linux/bitops.h>
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static int sifive_gpio_probe(struct udevice *dev)
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{
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struct sifive_gpio_plat *plat = dev_get_plat(dev);
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struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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char name[18], *str;
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sprintf(name, "gpio@%4lx_", (uintptr_t)plat->base);
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str = strdup(name);
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if (!str)
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return -ENOMEM;
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uc_priv->bank_name = str;
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/*
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* Use the gpio count mentioned in device tree,
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* if not specified in dt, set NR_GPIOS as default
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*/
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uc_priv->gpio_count = dev_read_u32_default(dev, "ngpios", NR_GPIOS);
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return 0;
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}
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static void sifive_update_gpio_reg(void *bptr, u32 offset, bool value)
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{
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void __iomem *ptr = (void __iomem *)bptr;
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u32 bit = BIT(offset);
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u32 old = readl(ptr);
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if (value)
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writel(old | bit, ptr);
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else
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writel(old & ~bit, ptr);
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}
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static int sifive_gpio_direction_input(struct udevice *dev, u32 offset)
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{
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struct sifive_gpio_plat *plat = dev_get_plat(dev);
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struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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if (offset > uc_priv->gpio_count)
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return -EINVAL;
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/* Configure gpio direction as input */
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sifive_update_gpio_reg(plat->base + GPIO_INPUT_EN, offset, true);
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sifive_update_gpio_reg(plat->base + GPIO_OUTPUT_EN, offset, false);
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return 0;
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}
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static int sifive_gpio_direction_output(struct udevice *dev, u32 offset,
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int value)
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{
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struct sifive_gpio_plat *plat = dev_get_plat(dev);
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struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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if (offset > uc_priv->gpio_count)
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return -EINVAL;
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/* Configure gpio direction as output */
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sifive_update_gpio_reg(plat->base + GPIO_OUTPUT_EN, offset, true);
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sifive_update_gpio_reg(plat->base + GPIO_INPUT_EN, offset, false);
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/* Set the output state of the pin */
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sifive_update_gpio_reg(plat->base + GPIO_OUTPUT_VAL, offset, value);
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return 0;
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}
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static int sifive_gpio_get_value(struct udevice *dev, u32 offset)
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{
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struct sifive_gpio_plat *plat = dev_get_plat(dev);
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struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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int val;
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int dir;
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if (offset > uc_priv->gpio_count)
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return -EINVAL;
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/* Get direction of the pin */
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dir = !(readl(plat->base + GPIO_OUTPUT_EN) & BIT(offset));
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if (dir)
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val = readl(plat->base + GPIO_INPUT_VAL) & BIT(offset);
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else
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val = readl(plat->base + GPIO_OUTPUT_VAL) & BIT(offset);
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return val ? HIGH : LOW;
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}
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static int sifive_gpio_set_value(struct udevice *dev, u32 offset, int value)
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{
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struct sifive_gpio_plat *plat = dev_get_plat(dev);
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struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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if (offset > uc_priv->gpio_count)
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return -EINVAL;
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sifive_update_gpio_reg(plat->base + GPIO_OUTPUT_VAL, offset, value);
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return 0;
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}
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static int sifive_gpio_get_function(struct udevice *dev, unsigned int offset)
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{
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struct sifive_gpio_plat *plat = dev_get_plat(dev);
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u32 outdir, indir, val;
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struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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if (offset > uc_priv->gpio_count)
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return -1;
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/* Get direction of the pin */
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outdir = readl(plat->base + GPIO_OUTPUT_EN) & BIT(offset);
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indir = readl(plat->base + GPIO_INPUT_EN) & BIT(offset);
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if (outdir)
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/* Pin at specified offset is configured as output */
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val = GPIOF_OUTPUT;
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else if (indir)
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/* Pin at specified offset is configured as input */
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val = GPIOF_INPUT;
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else
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/*The requested GPIO is not set as input or output */
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val = GPIOF_UNUSED;
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return val;
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}
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static const struct udevice_id sifive_gpio_match[] = {
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{ .compatible = "sifive,gpio0" },
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{ }
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};
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static const struct dm_gpio_ops sifive_gpio_ops = {
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.direction_input = sifive_gpio_direction_input,
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.direction_output = sifive_gpio_direction_output,
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.get_value = sifive_gpio_get_value,
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.set_value = sifive_gpio_set_value,
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.get_function = sifive_gpio_get_function,
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};
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static int sifive_gpio_of_to_plat(struct udevice *dev)
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{
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struct sifive_gpio_plat *plat = dev_get_plat(dev);
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plat->base = dev_read_addr_ptr(dev);
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if (!plat->base)
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return -EINVAL;
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return 0;
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}
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U_BOOT_DRIVER(gpio_sifive) = {
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.name = "gpio_sifive",
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.id = UCLASS_GPIO,
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.of_match = sifive_gpio_match,
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.of_to_plat = of_match_ptr(sifive_gpio_of_to_plat),
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.plat_auto = sizeof(struct sifive_gpio_plat),
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.ops = &sifive_gpio_ops,
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.probe = sifive_gpio_probe,
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};
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