u-boot/arch/riscv
Lukas Auer c7e1effb96 riscv: support SPL stack and global data relocation
To support relocation of the stack and global data on RISC-V, the
secondary harts must be notified of the change using IPIs. We can reuse
the hart relocation code for this purpose. It uses global data to store
the new stack pointer and global data pointer for the secondary harts.
This means that we cannot update the global data pointer of the main
hart in spl_relocate_stack_gd(), because the secondary harts have not
yet been relocated at this point. It is updated after the secondary
harts have been notified.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2019-08-26 16:07:42 +08:00
..
cpu riscv: support SPL stack and global data relocation 2019-08-26 16:07:42 +08:00
dts dts: switch spi-flash to jedec, spi-nor compatible 2019-04-12 10:54:27 +05:30
include/asm riscv: add SPL support 2019-08-26 16:07:42 +08:00
lib riscv: add SPL support 2019-08-26 16:07:42 +08:00
config.mk riscv: qemu: define standalone load address 2019-01-15 09:36:31 +08:00
Kconfig riscv: add SPL support 2019-08-26 16:07:42 +08:00
Makefile riscv: add Kconfig entries for the code model 2018-12-18 09:56:26 +08:00