mirror of
https://github.com/AsahiLinux/u-boot
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170732523b
At present each invocation of run_steps() updates OUTPUT_FILES_COMMON, since it does not make a copy of the dict. This is fine for a single invocation, but for tests, run_steps() is invoked many times. As a result it may include unwanted items from the previous run, if it happens that a test runs twice on the same CPU. The problem has not been noticied previously, as there are few enough tests and enough CPUs that is is rare for the 'wrong' combination of tests to run together. Fix this by making a copy of the dict, before updating it. Update the tests to suit, taking account of the files that are no-longer generated. With this fix, we no-longer generate files which are not needed for a particular state of OF_PLATDATA_INST, so the check_instantiate() function is not needed anymore. It has become dead code and so fails the code-coverage test (dtoc -T). Remove it. Signed-off-by: Simon Glass <sjg@chromium.org>
1219 lines
46 KiB
Python
1219 lines
46 KiB
Python
#!/usr/bin/python
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# SPDX-License-Identifier: GPL-2.0+
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#
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# Copyright (C) 2017 Google, Inc
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# Written by Simon Glass <sjg@chromium.org>
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#
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"""Device tree to platform data class
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This supports converting device tree data to C structures definitions and
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static data.
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See doc/driver-model/of-plat.rst for more informaiton
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"""
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import collections
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import copy
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from enum import IntEnum
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import os
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import re
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import sys
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from dtoc import fdt
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from dtoc import fdt_util
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from dtoc import src_scan
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from dtoc.src_scan import conv_name_to_c
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# When we see these properties we ignore them - i.e. do not create a structure
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# member
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PROP_IGNORE_LIST = [
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'#address-cells',
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'#gpio-cells',
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'#size-cells',
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'compatible',
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'linux,phandle',
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"status",
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'phandle',
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'u-boot,dm-pre-reloc',
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'u-boot,dm-tpl',
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'u-boot,dm-spl',
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]
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# C type declarations for the types we support
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TYPE_NAMES = {
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fdt.Type.INT: 'fdt32_t',
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fdt.Type.BYTE: 'unsigned char',
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fdt.Type.STRING: 'const char *',
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fdt.Type.BOOL: 'bool',
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fdt.Type.INT64: 'fdt64_t',
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}
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STRUCT_PREFIX = 'dtd_'
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VAL_PREFIX = 'dtv_'
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# Properties which are considered to be phandles
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# key: property name
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# value: name of associated #cells property in the target node
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#
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# New phandle properties must be added here; otherwise they will come through as
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# simple integers and finding devices by phandle will not work.
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# Any property that ends with one of these (e.g. 'cd-gpios') will be considered
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# a phandle property.
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PHANDLE_PROPS = {
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'clocks': '#clock-cells',
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'gpios': '#gpio-cells',
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'sandbox,emul': '#emul-cells',
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}
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class Ftype(IntEnum):
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SOURCE, HEADER = range(2)
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# This holds information about each type of output file dtoc can create
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# type: Type of file (Ftype)
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# fname: Filename excluding directory, e.g. 'dt-plat.c'
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# hdr_comment: Comment explaining the purpose of the file
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OutputFile = collections.namedtuple('OutputFile',
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['ftype', 'fname', 'method', 'hdr_comment'])
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# This holds information about a property which includes phandles.
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#
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# max_args: integer: Maximum number or arguments that any phandle uses (int).
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# args: Number of args for each phandle in the property. The total number of
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# phandles is len(args). This is a list of integers.
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PhandleInfo = collections.namedtuple('PhandleInfo', ['max_args', 'args'])
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# Holds a single phandle link, allowing a C struct value to be assigned to point
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# to a device
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#
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# var_node: C variable to assign (e.g. 'dtv_mmc.clocks[0].node')
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# dev_name: Name of device to assign to (e.g. 'clock')
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PhandleLink = collections.namedtuple('PhandleLink', ['var_node', 'dev_name'])
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def tab_to(num_tabs, line):
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"""Append tabs to a line of text to reach a tab stop.
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Args:
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num_tabs (int): Tab stop to obtain (0 = column 0, 1 = column 8, etc.)
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line (str): Line of text to append to
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Returns:
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str: line with the correct number of tabs appeneded. If the line already
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extends past that tab stop then a single space is appended.
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"""
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if len(line) >= num_tabs * 8:
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return line + ' '
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return line + '\t' * (num_tabs - len(line) // 8)
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def get_value(ftype, value):
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"""Get a value as a C expression
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For integers this returns a byte-swapped (little-endian) hex string
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For bytes this returns a hex string, e.g. 0x12
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For strings this returns a literal string enclosed in quotes
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For booleans this return 'true'
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Args:
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ftype (fdt.Type): Data type (fdt_util)
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value (bytes): Data value, as a string of bytes
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Returns:
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str: String representation of the value
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"""
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if ftype == fdt.Type.INT:
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val = '%#x' % fdt_util.fdt32_to_cpu(value)
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elif ftype == fdt.Type.BYTE:
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char = value[0]
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val = '%#x' % (ord(char) if isinstance(char, str) else char)
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elif ftype == fdt.Type.STRING:
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# Handle evil ACPI backslashes by adding another backslash before them.
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# So "\\_SB.GPO0" in the device tree effectively stays like that in C
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val = '"%s"' % value.replace('\\', '\\\\')
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elif ftype == fdt.Type.BOOL:
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val = 'true'
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else: # ftype == fdt.Type.INT64:
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val = '%#x' % value
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return val
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class DtbPlatdata():
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"""Provide a means to convert device tree binary data to platform data
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The output of this process is C structures which can be used in space-
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constrained encvironments where the ~3KB code overhead of device tree
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code is not affordable.
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Properties:
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_scan: Scan object, for scanning and reporting on useful information
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from the U-Boot source code
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_fdt: Fdt object, referencing the device tree
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_dtb_fname: Filename of the input device tree binary file
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_valid_nodes_unsorted: A list of Node object with compatible strings,
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ordered by devicetree node order
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_valid_nodes: A list of Node object with compatible strings, ordered by
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conv_name_to_c(node.name)
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_include_disabled: true to include nodes marked status = "disabled"
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_outfile: The current output file (sys.stdout or a real file)
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_lines: Stashed list of output lines for outputting in the future
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_dirname: Directory to hold output files, or None for none (all files
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go to stdout)
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_struct_data (dict): OrderedDict of dtplat structures to output
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key (str): Node name, as a C identifier
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value: dict containing structure fields:
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key (str): Field name
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value: Prop object with field information
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_basedir (str): Base directory of source tree
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_valid_uclasses (list of src_scan.Uclass): List of uclasses needed for
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the selected devices (see _valid_node), in alphabetical order
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_instantiate: Instantiate devices so they don't need to be bound at
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run-time
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"""
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def __init__(self, scan, dtb_fname, include_disabled, instantiate=False):
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self._scan = scan
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self._fdt = None
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self._dtb_fname = dtb_fname
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self._valid_nodes = None
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self._valid_nodes_unsorted = None
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self._include_disabled = include_disabled
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self._outfile = None
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self._lines = []
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self._dirnames = [None] * len(Ftype)
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self._struct_data = collections.OrderedDict()
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self._basedir = None
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self._valid_uclasses = None
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self._instantiate = instantiate
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def setup_output_dirs(self, output_dirs):
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"""Set up the output directories
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This should be done before setup_output() is called
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Args:
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output_dirs (tuple of str):
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Directory to use for C output files.
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Use None to write files relative current directory
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Directory to use for H output files.
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Defaults to the C output dir
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"""
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def process_dir(ftype, dirname):
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if dirname:
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os.makedirs(dirname, exist_ok=True)
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self._dirnames[ftype] = dirname
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if output_dirs:
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c_dirname = output_dirs[0]
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h_dirname = output_dirs[1] if len(output_dirs) > 1 else c_dirname
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process_dir(Ftype.SOURCE, c_dirname)
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process_dir(Ftype.HEADER, h_dirname)
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def setup_output(self, ftype, fname):
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"""Set up the output destination
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Once this is done, future calls to self.out() will output to this
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file. The file used is as follows:
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self._dirnames[ftype] is None: output to fname, or stdout if None
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self._dirnames[ftype] is not None: output to fname in that directory
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Calling this function multiple times will close the old file and open
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the new one. If they are the same file, nothing happens and output will
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continue to the same file.
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Args:
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ftype (str): Type of file to create ('c' or 'h')
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fname (str): Filename to send output to. If there is a directory in
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self._dirnames for this file type, it will be put in that
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directory
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"""
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dirname = self._dirnames[ftype]
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if dirname:
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pathname = os.path.join(dirname, fname)
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if self._outfile:
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self._outfile.close()
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self._outfile = open(pathname, 'w')
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elif fname:
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if not self._outfile:
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self._outfile = open(fname, 'w')
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else:
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self._outfile = sys.stdout
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def finish_output(self):
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"""Finish outputing to a file
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This closes the output file, if one is in use
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"""
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if self._outfile != sys.stdout:
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self._outfile.close()
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self._outfile = None
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def out(self, line):
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"""Output a string to the output file
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Args:
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line (str): String to output
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"""
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self._outfile.write(line)
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def buf(self, line):
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"""Buffer up a string to send later
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Args:
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line (str): String to add to our 'buffer' list
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"""
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self._lines.append(line)
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def get_buf(self):
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"""Get the contents of the output buffer, and clear it
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Returns:
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list(str): The output buffer, which is then cleared for future use
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"""
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lines = self._lines
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self._lines = []
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return lines
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def out_header(self, outfile):
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"""Output a message indicating that this is an auto-generated file
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Args:
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outfile: OutputFile describing the file being generated
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"""
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self.out('''/*
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* DO NOT MODIFY
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*
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* %s.
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* This was generated by dtoc from a .dtb (device tree binary) file.
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*/
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''' % outfile.hdr_comment)
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def get_phandle_argc(self, prop, node_name):
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"""Check if a node contains phandles
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We have no reliable way of detecting whether a node uses a phandle
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or not. As an interim measure, use a list of known property names.
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Args:
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prop (fdt.Prop): Prop object to check
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node_name (str): Node name, only used for raising an error
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Returns:
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int or None: Number of argument cells is this is a phandle,
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else None
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Raises:
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ValueError: if the phandle cannot be parsed or the required property
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is not present
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"""
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cells_prop = None
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for name, cprop in PHANDLE_PROPS.items():
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if prop.name.endswith(name):
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cells_prop = cprop
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if cells_prop:
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if not isinstance(prop.value, list):
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prop.value = [prop.value]
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val = prop.value
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i = 0
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max_args = 0
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args = []
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while i < len(val):
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phandle = fdt_util.fdt32_to_cpu(val[i])
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# If we get to the end of the list, stop. This can happen
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# since some nodes have more phandles in the list than others,
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# but we allocate enough space for the largest list. So those
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# nodes with shorter lists end up with zeroes at the end.
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if not phandle:
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break
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target = self._fdt.phandle_to_node.get(phandle)
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if not target:
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raise ValueError("Cannot parse '%s' in node '%s'" %
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(prop.name, node_name))
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cells = target.props.get(cells_prop)
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if not cells:
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raise ValueError("Node '%s' has no cells property" %
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target.name)
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num_args = fdt_util.fdt32_to_cpu(cells.value)
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max_args = max(max_args, num_args)
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args.append(num_args)
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i += 1 + num_args
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return PhandleInfo(max_args, args)
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return None
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def scan_dtb(self):
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"""Scan the device tree to obtain a tree of nodes and properties
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Once this is done, self._fdt.GetRoot() can be called to obtain the
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device tree root node, and progress from there.
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"""
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self._fdt = fdt.FdtScan(self._dtb_fname)
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def scan_node(self, node, valid_nodes):
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"""Scan a node and subnodes to build a tree of node and phandle info
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This adds each subnode to self._valid_nodes if it is enabled and has a
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compatible string.
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Args:
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node (Node): Node for scan for subnodes
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valid_nodes (list of Node): List of Node objects to add to
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"""
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for subnode in node.subnodes:
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if 'compatible' in subnode.props:
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status = subnode.props.get('status')
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if (not self._include_disabled and not status or
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status.value != 'disabled'):
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valid_nodes.append(subnode)
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# recurse to handle any subnodes
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self.scan_node(subnode, valid_nodes)
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def scan_tree(self, add_root):
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"""Scan the device tree for useful information
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This fills in the following properties:
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_valid_nodes_unsorted: A list of nodes we wish to consider include
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in the platform data (in devicetree node order)
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_valid_nodes: Sorted version of _valid_nodes_unsorted
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Args:
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add_root: True to add the root node also (which wouldn't normally
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be added as it may not have a compatible string)
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"""
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root = self._fdt.GetRoot()
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valid_nodes = []
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if add_root:
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valid_nodes.append(root)
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self.scan_node(root, valid_nodes)
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self._valid_nodes_unsorted = valid_nodes
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self._valid_nodes = sorted(valid_nodes,
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key=lambda x: conv_name_to_c(x.name))
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def prepare_nodes(self):
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"""Add extra properties to the nodes we are using
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The following properties are added for use by dtoc:
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idx: Index number of this node (0=first, etc.)
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struct_name: Name of the struct dtd used by this node
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var_name: C name for this node
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child_devs: List of child devices for this node, each a None
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child_refs: Dict of references for each child:
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key: Position in child list (-1=head, 0=first, 1=second, ...
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n-1=last, n=head)
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seq: Sequence number of the device (unique within its uclass), or
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-1 not not known yet
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dev_ref: Reference to this device, e.g. 'DM_DEVICE_REF(serial)'
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driver: Driver record for this node, or None if not known
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uclass: Uclass record for this node, or None if not known
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uclass_seq: Position of this device within the uclass list (0=first,
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n-1=last)
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parent_seq: Position of this device within it siblings (0=first,
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n-1=last)
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parent_driver: Driver record of the node's parent, or None if none.
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We don't use node.parent.driver since node.parent may not be in
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the list of valid nodes
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"""
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for idx, node in enumerate(self._valid_nodes):
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node.idx = idx
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node.struct_name, _ = self._scan.get_normalized_compat_name(node)
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node.var_name = conv_name_to_c(node.name)
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node.child_devs = []
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node.child_refs = {}
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node.seq = -1
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node.dev_ref = None
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node.driver = None
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node.uclass = None
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node.uclass_seq = None
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node.parent_seq = None
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node.parent_driver = None
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@staticmethod
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def get_num_cells(node):
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"""Get the number of cells in addresses and sizes for this node
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Args:
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node (fdt.None): Node to check
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Returns:
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Tuple:
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Number of address cells for this node
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Number of size cells for this node
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"""
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parent = node.parent
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if parent and not parent.props:
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raise ValueError("Parent node '%s' has no properties - do you need u-boot,dm-spl or similar?" %
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parent.path)
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num_addr, num_size = 2, 2
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if parent:
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addr_prop = parent.props.get('#address-cells')
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size_prop = parent.props.get('#size-cells')
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if addr_prop:
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num_addr = fdt_util.fdt32_to_cpu(addr_prop.value)
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if size_prop:
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num_size = fdt_util.fdt32_to_cpu(size_prop.value)
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return num_addr, num_size
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def scan_reg_sizes(self):
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"""Scan for 64-bit 'reg' properties and update the values
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This finds 'reg' properties with 64-bit data and converts the value to
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an array of 64-values. This allows it to be output in a way that the
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C code can read.
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"""
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for node in self._valid_nodes:
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reg = node.props.get('reg')
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if not reg:
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continue
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num_addr, num_size = self.get_num_cells(node)
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total = num_addr + num_size
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if reg.type != fdt.Type.INT:
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raise ValueError("Node '%s' reg property is not an int" %
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node.name)
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if not isinstance(reg.value, list):
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reg.value = [reg.value]
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if len(reg.value) % total:
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raise ValueError(
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"Node '%s' (parent '%s') reg property has %d cells "
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'which is not a multiple of na + ns = %d + %d)' %
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(node.name, node.parent.name, len(reg.value), num_addr,
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num_size))
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reg.num_addr = num_addr
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reg.num_size = num_size
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if num_addr > 1 or num_size > 1:
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reg.type = fdt.Type.INT64
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i = 0
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new_value = []
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val = reg.value
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while i < len(val):
|
|
addr = fdt_util.fdt_cells_to_cpu(val[i:], reg.num_addr)
|
|
i += num_addr
|
|
size = fdt_util.fdt_cells_to_cpu(val[i:], reg.num_size)
|
|
i += num_size
|
|
new_value += [addr, size]
|
|
reg.value = new_value
|
|
|
|
def scan_structs(self):
|
|
"""Scan the device tree building up the C structures we will use.
|
|
|
|
Build a dict keyed by C struct name containing a dict of Prop
|
|
object for each struct field (keyed by property name). Where the
|
|
same struct appears multiple times, try to use the 'widest'
|
|
property, i.e. the one with a type which can express all others.
|
|
|
|
Once the widest property is determined, all other properties are
|
|
updated to match that width.
|
|
|
|
The results are written to self._struct_data
|
|
"""
|
|
structs = self._struct_data
|
|
for node in self._valid_nodes:
|
|
fields = {}
|
|
|
|
# Get a list of all the valid properties in this node.
|
|
for name, prop in node.props.items():
|
|
if name not in PROP_IGNORE_LIST and name[0] != '#':
|
|
fields[name] = copy.deepcopy(prop)
|
|
|
|
# If we've seen this struct_name before, update the existing struct
|
|
if node.struct_name in structs:
|
|
struct = structs[node.struct_name]
|
|
for name, prop in fields.items():
|
|
oldprop = struct.get(name)
|
|
if oldprop:
|
|
oldprop.Widen(prop)
|
|
else:
|
|
struct[name] = prop
|
|
|
|
# Otherwise store this as a new struct.
|
|
else:
|
|
structs[node.struct_name] = fields
|
|
|
|
for node in self._valid_nodes:
|
|
struct = structs[node.struct_name]
|
|
for name, prop in node.props.items():
|
|
if name not in PROP_IGNORE_LIST and name[0] != '#':
|
|
prop.Widen(struct[name])
|
|
|
|
def scan_phandles(self):
|
|
"""Figure out what phandles each node uses
|
|
|
|
We need to be careful when outputing nodes that use phandles since
|
|
they must come after the declaration of the phandles in the C file.
|
|
Otherwise we get a compiler error since the phandle struct is not yet
|
|
declared.
|
|
|
|
This function adds to each node a list of phandle nodes that the node
|
|
depends on. This allows us to output things in the right order.
|
|
"""
|
|
for node in self._valid_nodes:
|
|
node.phandles = set()
|
|
for pname, prop in node.props.items():
|
|
if pname in PROP_IGNORE_LIST or pname[0] == '#':
|
|
continue
|
|
info = self.get_phandle_argc(prop, node.name)
|
|
if info:
|
|
# Process the list as pairs of (phandle, id)
|
|
pos = 0
|
|
for args in info.args:
|
|
phandle_cell = prop.value[pos]
|
|
phandle = fdt_util.fdt32_to_cpu(phandle_cell)
|
|
target_node = self._fdt.phandle_to_node[phandle]
|
|
node.phandles.add(target_node)
|
|
pos += 1 + args
|
|
|
|
|
|
def generate_structs(self):
|
|
"""Generate struct defintions for the platform data
|
|
|
|
This writes out the body of a header file consisting of structure
|
|
definitions for node in self._valid_nodes. See the documentation in
|
|
doc/driver-model/of-plat.rst for more information.
|
|
"""
|
|
structs = self._struct_data
|
|
self.out('#include <stdbool.h>\n')
|
|
self.out('#include <linux/libfdt.h>\n')
|
|
|
|
# Output the struct definition
|
|
for name in sorted(structs):
|
|
self.out('struct %s%s {\n' % (STRUCT_PREFIX, name))
|
|
for pname in sorted(structs[name]):
|
|
prop = structs[name][pname]
|
|
info = self.get_phandle_argc(prop, structs[name])
|
|
if info:
|
|
# For phandles, include a reference to the target
|
|
struct_name = 'struct phandle_%d_arg' % info.max_args
|
|
self.out('\t%s%s[%d]' % (tab_to(2, struct_name),
|
|
conv_name_to_c(prop.name),
|
|
len(info.args)))
|
|
else:
|
|
ptype = TYPE_NAMES[prop.type]
|
|
self.out('\t%s%s' % (tab_to(2, ptype),
|
|
conv_name_to_c(prop.name)))
|
|
if isinstance(prop.value, list):
|
|
self.out('[%d]' % len(prop.value))
|
|
self.out(';\n')
|
|
self.out('};\n')
|
|
|
|
def _output_list(self, node, prop):
|
|
"""Output the C code for a devicetree property that holds a list
|
|
|
|
Args:
|
|
node (fdt.Node): Node to output
|
|
prop (fdt.Prop): Prop to output
|
|
"""
|
|
self.buf('{')
|
|
vals = []
|
|
# For phandles, output a reference to the platform data
|
|
# of the target node.
|
|
info = self.get_phandle_argc(prop, node.name)
|
|
if info:
|
|
# Process the list as pairs of (phandle, id)
|
|
pos = 0
|
|
for args in info.args:
|
|
phandle_cell = prop.value[pos]
|
|
phandle = fdt_util.fdt32_to_cpu(phandle_cell)
|
|
target_node = self._fdt.phandle_to_node[phandle]
|
|
arg_values = []
|
|
for i in range(args):
|
|
arg_values.append(
|
|
str(fdt_util.fdt32_to_cpu(prop.value[pos + 1 + i])))
|
|
pos += 1 + args
|
|
vals.append('\t{%d, {%s}}' % (target_node.idx,
|
|
', '.join(arg_values)))
|
|
for val in vals:
|
|
self.buf('\n\t\t%s,' % val)
|
|
else:
|
|
for val in prop.value:
|
|
vals.append(get_value(prop.type, val))
|
|
|
|
# Put 8 values per line to avoid very long lines.
|
|
for i in range(0, len(vals), 8):
|
|
if i:
|
|
self.buf(',\n\t\t')
|
|
self.buf(', '.join(vals[i:i + 8]))
|
|
self.buf('}')
|
|
|
|
def _declare_device(self, node):
|
|
"""Add a device declaration to the output
|
|
|
|
This declares a U_BOOT_DRVINFO() for the device being processed
|
|
|
|
Args:
|
|
node: Node to process
|
|
"""
|
|
self.buf('U_BOOT_DRVINFO(%s) = {\n' % node.var_name)
|
|
self.buf('\t.name\t\t= "%s",\n' % node.struct_name)
|
|
self.buf('\t.plat\t\t= &%s%s,\n' % (VAL_PREFIX, node.var_name))
|
|
self.buf('\t.plat_size\t= sizeof(%s%s),\n' %
|
|
(VAL_PREFIX, node.var_name))
|
|
idx = -1
|
|
if node.parent and node.parent in self._valid_nodes:
|
|
idx = node.parent.idx
|
|
self.buf('\t.parent_idx\t= %d,\n' % idx)
|
|
self.buf('};\n')
|
|
self.buf('\n')
|
|
|
|
def prep_priv(self, struc, name, suffix, section='.priv_data'):
|
|
if not struc:
|
|
return None
|
|
var_name = '_%s%s' % (name, suffix)
|
|
hdr = self._scan._structs.get(struc)
|
|
if hdr:
|
|
self.buf('#include <%s>\n' % hdr.fname)
|
|
else:
|
|
print('Warning: Cannot find header file for struct %s' % struc)
|
|
attr = '__attribute__ ((section ("%s")))' % section
|
|
return var_name, struc, attr
|
|
|
|
def alloc_priv(self, info, name, extra, suffix='_priv'):
|
|
result = self.prep_priv(info, name, suffix)
|
|
if not result:
|
|
return None
|
|
var_name, struc, section = result
|
|
self.buf('u8 %s_%s[sizeof(struct %s)]\n\t%s;\n' %
|
|
(var_name, extra, struc.strip(), section))
|
|
return '%s_%s' % (var_name, extra)
|
|
|
|
def alloc_plat(self, info, name, extra, node):
|
|
result = self.prep_priv(info, name, '_plat')
|
|
if not result:
|
|
return None
|
|
var_name, struc, section = result
|
|
self.buf('struct %s %s\n\t%s_%s = {\n' %
|
|
(struc.strip(), section, var_name, extra))
|
|
self.buf('\t.dtplat = {\n')
|
|
for pname in sorted(node.props):
|
|
self._output_prop(node, node.props[pname], 2)
|
|
self.buf('\t},\n')
|
|
self.buf('};\n')
|
|
return '&%s_%s' % (var_name, extra)
|
|
|
|
def _declare_device_inst(self, node, parent_driver):
|
|
"""Add a device instance declaration to the output
|
|
|
|
This declares a DM_DEVICE_INST() for the device being processed
|
|
|
|
Args:
|
|
node: Node to output
|
|
"""
|
|
driver = node.driver
|
|
uclass = node.uclass
|
|
self.buf('\n')
|
|
num_lines = len(self._lines)
|
|
plat_name = self.alloc_plat(driver.plat, driver.name, node.var_name,
|
|
node)
|
|
priv_name = self.alloc_priv(driver.priv, driver.name, node.var_name)
|
|
parent_plat_name = None
|
|
parent_priv_name = None
|
|
if parent_driver:
|
|
# TODO: deal with uclass providing these values
|
|
parent_plat_name = self.alloc_priv(
|
|
parent_driver.child_plat, driver.name, node.var_name,
|
|
'_parent_plat')
|
|
parent_priv_name = self.alloc_priv(
|
|
parent_driver.child_priv, driver.name, node.var_name,
|
|
'_parent_priv')
|
|
uclass_plat_name = self.alloc_priv(
|
|
uclass.per_dev_plat, driver.name + '_uc', node.var_name, 'plat')
|
|
uclass_priv_name = self.alloc_priv(uclass.per_dev_priv,
|
|
driver.name + '_uc', node.var_name)
|
|
for hdr in driver.headers:
|
|
self.buf('#include %s\n' % hdr)
|
|
|
|
# Add a blank line if we emitted any stuff above, for readability
|
|
if num_lines != len(self._lines):
|
|
self.buf('\n')
|
|
|
|
self.buf('DM_DEVICE_INST(%s) = {\n' % node.var_name)
|
|
self.buf('\t.driver\t\t= DM_DRIVER_REF(%s),\n' % node.struct_name)
|
|
self.buf('\t.name\t\t= "%s",\n' % node.struct_name)
|
|
if plat_name:
|
|
self.buf('\t.plat_\t\t= %s,\n' % plat_name)
|
|
else:
|
|
self.buf('\t.plat_\t\t= &%s%s,\n' % (VAL_PREFIX, node.var_name))
|
|
if parent_plat_name:
|
|
self.buf('\t.parent_plat_\t= %s,\n' % parent_plat_name)
|
|
if uclass_plat_name:
|
|
self.buf('\t.uclass_plat_\t= %s,\n' % uclass_plat_name)
|
|
driver_date = None
|
|
|
|
if node != self._fdt.GetRoot():
|
|
compat_list = node.props['compatible'].value
|
|
if not isinstance(compat_list, list):
|
|
compat_list = [compat_list]
|
|
for compat in compat_list:
|
|
driver_data = driver.compat.get(compat)
|
|
if driver_data:
|
|
self.buf('\t.driver_data\t= %s,\n' % driver_data)
|
|
break
|
|
|
|
if node.parent and node.parent.parent:
|
|
self.buf('\t.parent\t\t= DM_DEVICE_REF(%s),\n' %
|
|
node.parent.var_name)
|
|
if priv_name:
|
|
self.buf('\t.priv_\t\t= %s,\n' % priv_name)
|
|
self.buf('\t.uclass\t\t= DM_UCLASS_REF(%s),\n' % uclass.name)
|
|
|
|
if uclass_priv_name:
|
|
self.buf('\t.uclass_priv_ = %s,\n' % uclass_priv_name)
|
|
if parent_priv_name:
|
|
self.buf('\t.parent_priv_\t= %s,\n' % parent_priv_name)
|
|
self.list_node('uclass_node', uclass.node_refs, node.uclass_seq)
|
|
self.list_head('child_head', 'sibling_node', node.child_devs, node.var_name)
|
|
if node.parent in self._valid_nodes:
|
|
self.list_node('sibling_node', node.parent.child_refs,
|
|
node.parent_seq)
|
|
# flags is left as 0
|
|
|
|
self.buf('\t.seq_ = %d,\n' % node.seq)
|
|
|
|
self.buf('};\n')
|
|
self.buf('\n')
|
|
return parent_plat_name
|
|
|
|
def _output_prop(self, node, prop, tabs=1):
|
|
"""Output a line containing the value of a struct member
|
|
|
|
Args:
|
|
node (Node): Node being output
|
|
prop (Prop): Prop object to output
|
|
"""
|
|
if prop.name in PROP_IGNORE_LIST or prop.name[0] == '#':
|
|
return
|
|
member_name = conv_name_to_c(prop.name)
|
|
self.buf('%s%s= ' % ('\t' * tabs, tab_to(3, '.' + member_name)))
|
|
|
|
# Special handling for lists
|
|
if isinstance(prop.value, list):
|
|
self._output_list(node, prop)
|
|
else:
|
|
self.buf(get_value(prop.type, prop.value))
|
|
self.buf(',\n')
|
|
|
|
def _output_values(self, node):
|
|
"""Output the definition of a device's struct values
|
|
|
|
Args:
|
|
node (Node): Node to output
|
|
"""
|
|
self.buf('static struct %s%s %s%s = {\n' %
|
|
(STRUCT_PREFIX, node.struct_name, VAL_PREFIX, node.var_name))
|
|
for pname in sorted(node.props):
|
|
self._output_prop(node, node.props[pname])
|
|
self.buf('};\n')
|
|
|
|
def list_head(self, head_member, node_member, node_refs, var_name):
|
|
self.buf('\t.%s\t= {\n' % head_member)
|
|
if node_refs:
|
|
last = node_refs[-1].dev_ref
|
|
first = node_refs[0].dev_ref
|
|
member = node_member
|
|
else:
|
|
last = 'DM_DEVICE_REF(%s)' % var_name
|
|
first = last
|
|
member = head_member
|
|
self.buf('\t\t.prev = &%s->%s,\n' % (last, member))
|
|
self.buf('\t\t.next = &%s->%s,\n' % (first, member))
|
|
self.buf('\t},\n')
|
|
|
|
def list_node(self, member, node_refs, seq):
|
|
self.buf('\t.%s\t= {\n' % member)
|
|
self.buf('\t\t.prev = %s,\n' % node_refs[seq - 1])
|
|
self.buf('\t\t.next = %s,\n' % node_refs[seq + 1])
|
|
self.buf('\t},\n')
|
|
|
|
def generate_uclasses(self):
|
|
self.out('\n')
|
|
self.out('#include <common.h>\n')
|
|
self.out('#include <dm.h>\n')
|
|
self.out('#include <dt-structs.h>\n')
|
|
self.out('\n')
|
|
self.buf('/*\n')
|
|
self.buf(
|
|
" * uclass declarations, ordered by 'struct uclass' linker_list idx:\n")
|
|
uclass_list = self._valid_uclasses
|
|
for seq, uclass in enumerate(uclass_list):
|
|
self.buf(' * %3d: %s\n' % (seq, uclass.name))
|
|
self.buf(' *\n')
|
|
self.buf(' * Sequence numbers allocated in each uclass:\n')
|
|
for uclass in uclass_list:
|
|
if uclass.alias_num_to_node:
|
|
self.buf(' * %s: %s\n' % (uclass.name, uclass.uclass_id))
|
|
for seq, node in uclass.alias_num_to_node.items():
|
|
self.buf(' * %d: %s\n' % (seq, node.path))
|
|
self.buf(' */\n')
|
|
|
|
uclass_node = {}
|
|
for seq, uclass in enumerate(uclass_list):
|
|
uclass_node[seq] = ('&DM_UCLASS_REF(%s)->sibling_node' %
|
|
uclass.name)
|
|
uclass_node[-1] = '&uclass_head'
|
|
uclass_node[len(uclass_list)] = '&uclass_head'
|
|
self.buf('\n')
|
|
self.buf('struct list_head %s = {\n' % 'uclass_head')
|
|
self.buf('\t.prev = %s,\n' % uclass_node[len(uclass_list) -1])
|
|
self.buf('\t.next = %s,\n' % uclass_node[0])
|
|
self.buf('};\n')
|
|
self.buf('\n')
|
|
|
|
for seq, uclass in enumerate(uclass_list):
|
|
uc_drv = self._scan._uclass.get(uclass.uclass_id)
|
|
|
|
priv_name = self.alloc_priv(uc_drv.priv, uc_drv.name, '')
|
|
|
|
self.buf('DM_UCLASS_INST(%s) = {\n' % uclass.name)
|
|
if priv_name:
|
|
self.buf('\t.priv_\t\t= %s,\n' % priv_name)
|
|
self.buf('\t.uc_drv\t\t= DM_UCLASS_DRIVER_REF(%s),\n' % uclass.name)
|
|
self.list_node('sibling_node', uclass_node, seq)
|
|
self.list_head('dev_head', 'uclass_node', uc_drv.devs, None)
|
|
self.buf('};\n')
|
|
self.buf('\n')
|
|
self.out(''.join(self.get_buf()))
|
|
|
|
def read_aliases(self):
|
|
"""Read the aliases and attach the information to self._alias
|
|
|
|
Raises:
|
|
ValueError: The alias path is not found
|
|
"""
|
|
alias_node = self._fdt.GetNode('/aliases')
|
|
if not alias_node:
|
|
return
|
|
re_num = re.compile('(^[a-z0-9-]+[a-z]+)([0-9]+)$')
|
|
for prop in alias_node.props.values():
|
|
m_alias = re_num.match(prop.name)
|
|
if not m_alias:
|
|
raise ValueError("Cannot decode alias '%s'" % prop.name)
|
|
name, num = m_alias.groups()
|
|
node = self._fdt.GetNode(prop.value)
|
|
result = self._scan.add_uclass_alias(name, num, node)
|
|
if result is None:
|
|
raise ValueError("Alias '%s' path '%s' not found" %
|
|
(prop.name, prop.value))
|
|
elif result is False:
|
|
print("Could not find uclass for alias '%s'" % prop.name)
|
|
|
|
def generate_decl(self):
|
|
nodes_to_output = list(self._valid_nodes)
|
|
|
|
self.buf('#include <dm/device-internal.h>\n')
|
|
self.buf('#include <dm/uclass-internal.h>\n')
|
|
self.buf('\n')
|
|
self.buf(
|
|
'/* driver declarations - these allow DM_DRIVER_GET() to be used */\n')
|
|
for node in nodes_to_output:
|
|
self.buf('extern U_BOOT_DRIVER(%s);\n' % node.struct_name);
|
|
self.buf('\n')
|
|
|
|
if self._instantiate:
|
|
self.buf(
|
|
'/* device declarations - these allow DM_DEVICE_REF() to be used */\n')
|
|
for node in nodes_to_output:
|
|
self.buf('extern DM_DEVICE_INST(%s);\n' % node.var_name)
|
|
self.buf('\n')
|
|
|
|
uclass_list = self._valid_uclasses
|
|
|
|
self.buf(
|
|
'/* uclass driver declarations - needed for DM_UCLASS_DRIVER_REF() */\n')
|
|
for uclass in uclass_list:
|
|
self.buf('extern UCLASS_DRIVER(%s);\n' % uclass.name)
|
|
|
|
if self._instantiate:
|
|
self.buf('\n')
|
|
self.buf('/* uclass declarations - needed for DM_UCLASS_REF() */\n')
|
|
for uclass in uclass_list:
|
|
self.buf('extern DM_UCLASS_INST(%s);\n' % uclass.name)
|
|
self.out(''.join(self.get_buf()))
|
|
|
|
def assign_seqs(self):
|
|
"""Assign a sequence number to each node"""
|
|
for node in self._valid_nodes_unsorted:
|
|
seq = self._scan.assign_seq(node)
|
|
if seq is not None:
|
|
node.seq = seq
|
|
|
|
def process_nodes(self, need_drivers):
|
|
nodes_to_output = list(self._valid_nodes)
|
|
|
|
# Figure out which drivers we actually use
|
|
self._scan.mark_used(nodes_to_output)
|
|
|
|
for node in nodes_to_output:
|
|
node.dev_ref = 'DM_DEVICE_REF(%s)' % node.var_name
|
|
driver = self._scan.get_driver(node.struct_name)
|
|
if not driver:
|
|
if not need_drivers:
|
|
continue
|
|
raise ValueError("Cannot parse/find driver for '%s'" %
|
|
node.struct_name)
|
|
node.driver = driver
|
|
uclass = self._scan._uclass.get(driver.uclass_id)
|
|
if not uclass:
|
|
raise ValueError("Cannot parse/find uclass '%s' for driver '%s'" %
|
|
(driver.uclass_id, node.struct_name))
|
|
node.uclass = uclass
|
|
node.uclass_seq = len(node.uclass.devs)
|
|
node.uclass.devs.append(node)
|
|
uclass.node_refs[node.uclass_seq] = \
|
|
'&%s->uclass_node' % node.dev_ref
|
|
|
|
parent_driver = None
|
|
if node.parent in self._valid_nodes:
|
|
parent_driver = self._scan.get_driver(node.parent.struct_name)
|
|
if not parent_driver:
|
|
if not need_drivers:
|
|
continue
|
|
raise ValueError(
|
|
"Cannot parse/find parent driver '%s' for '%s'" %
|
|
(node.parent.struct_name, node.struct_name))
|
|
node.parent_seq = len(node.parent.child_devs)
|
|
node.parent.child_devs.append(node)
|
|
node.parent.child_refs[node.parent_seq] = \
|
|
'&%s->sibling_node' % node.dev_ref
|
|
node.parent_driver = parent_driver
|
|
|
|
for node in nodes_to_output:
|
|
ref = '&%s->child_head' % node.dev_ref
|
|
node.child_refs[-1] = ref
|
|
node.child_refs[len(node.child_devs)] = ref
|
|
|
|
uclass_set = set()
|
|
for driver in self._scan._drivers.values():
|
|
if driver.used and driver.uclass:
|
|
uclass_set.add(driver.uclass)
|
|
self._valid_uclasses = sorted(list(uclass_set),
|
|
key=lambda uc: uc.uclass_id)
|
|
|
|
for seq, uclass in enumerate(uclass_set):
|
|
ref = '&DM_UCLASS_REF(%s)->dev_head' % uclass.name
|
|
uclass.node_refs[-1] = ref
|
|
uclass.node_refs[len(uclass.devs)] = ref
|
|
|
|
def output_node_plat(self, node):
|
|
"""Output the C code for a node
|
|
|
|
Args:
|
|
node (fdt.Node): node to output
|
|
"""
|
|
driver = node.driver
|
|
parent_driver = node.parent_driver
|
|
|
|
line1 = 'Node %s index %d' % (node.path, node.idx)
|
|
if driver:
|
|
self.buf('/*\n')
|
|
self.buf(' * %s\n' % line1)
|
|
self.buf(' * driver %s parent %s\n' % (driver.name,
|
|
parent_driver.name if parent_driver else 'None'))
|
|
self.buf(' */\n')
|
|
else:
|
|
self.buf('/* %s */\n' % line1)
|
|
|
|
self._output_values(node)
|
|
self._declare_device(node)
|
|
|
|
self.out(''.join(self.get_buf()))
|
|
|
|
def output_node_instance(self, node):
|
|
"""Output the C code for a node
|
|
|
|
Args:
|
|
node (fdt.Node): node to output
|
|
"""
|
|
parent_driver = node.parent_driver
|
|
|
|
self.buf('/*\n')
|
|
self.buf(' * Node %s index %d\n' % (node.path, node.idx))
|
|
self.buf(' * driver %s parent %s\n' % (node.driver.name,
|
|
parent_driver.name if parent_driver else 'None'))
|
|
self.buf('*/\n')
|
|
|
|
if not node.driver.plat:
|
|
self._output_values(node)
|
|
self._declare_device_inst(node, parent_driver)
|
|
|
|
self.out(''.join(self.get_buf()))
|
|
|
|
def generate_plat(self):
|
|
"""Generate device defintions for the platform data
|
|
|
|
This writes out C platform data initialisation data and
|
|
U_BOOT_DRVINFO() declarations for each valid node. Where a node has
|
|
multiple compatible strings, a #define is used to make them equivalent.
|
|
|
|
See the documentation in doc/driver-model/of-plat.rst for more
|
|
information.
|
|
"""
|
|
self.out('/* Allow use of U_BOOT_DRVINFO() in this file */\n')
|
|
self.out('#define DT_PLAT_C\n')
|
|
self.out('\n')
|
|
self.out('#include <common.h>\n')
|
|
self.out('#include <dm.h>\n')
|
|
self.out('#include <dt-structs.h>\n')
|
|
self.out('\n')
|
|
|
|
if self._valid_nodes:
|
|
self.out('/*\n')
|
|
self.out(
|
|
" * driver_info declarations, ordered by 'struct driver_info' linker_list idx:\n")
|
|
self.out(' *\n')
|
|
self.out(' * idx %-20s %-s\n' % ('driver_info', 'driver'))
|
|
self.out(' * --- %-20s %-s\n' % ('-' * 20, '-' * 20))
|
|
for node in self._valid_nodes:
|
|
self.out(' * %3d: %-20s %-s\n' %
|
|
(node.idx, node.var_name, node.struct_name))
|
|
self.out(' * --- %-20s %-s\n' % ('-' * 20, '-' * 20))
|
|
self.out(' */\n')
|
|
self.out('\n')
|
|
|
|
for node in self._valid_nodes:
|
|
self.output_node_plat(node)
|
|
|
|
self.out(''.join(self.get_buf()))
|
|
|
|
def generate_device(self):
|
|
"""Generate device instances
|
|
|
|
This writes out DM_DEVICE_INST() records for each device in the
|
|
build.
|
|
|
|
See the documentation in doc/driver-model/of-plat.rst for more
|
|
information.
|
|
"""
|
|
self.out('#include <common.h>\n')
|
|
self.out('#include <dm.h>\n')
|
|
self.out('#include <dt-structs.h>\n')
|
|
self.out('\n')
|
|
|
|
if self._valid_nodes:
|
|
self.out('/*\n')
|
|
self.out(
|
|
" * udevice declarations, ordered by 'struct udevice' linker_list position:\n")
|
|
self.out(' *\n')
|
|
self.out(' * idx %-20s %-s\n' % ('udevice', 'driver'))
|
|
self.out(' * --- %-20s %-s\n' % ('-' * 20, '-' * 20))
|
|
for node in self._valid_nodes:
|
|
self.out(' * %3d: %-20s %-s\n' %
|
|
(node.idx, node.var_name, node.struct_name))
|
|
self.out(' * --- %-20s %-s\n' % ('-' * 20, '-' * 20))
|
|
self.out(' */\n')
|
|
self.out('\n')
|
|
|
|
for node in self._valid_nodes:
|
|
self.output_node_instance(node)
|
|
|
|
self.out(''.join(self.get_buf()))
|
|
|
|
|
|
# Types of output file we understand
|
|
# key: Command used to generate this file
|
|
# value: OutputFile for this command
|
|
OUTPUT_FILES_COMMON = {
|
|
'decl':
|
|
OutputFile(Ftype.HEADER, 'dt-decl.h', DtbPlatdata.generate_decl,
|
|
'Declares externs for all device/uclass instances'),
|
|
'struct':
|
|
OutputFile(Ftype.HEADER, 'dt-structs-gen.h',
|
|
DtbPlatdata.generate_structs,
|
|
'Defines the structs used to hold devicetree data'),
|
|
}
|
|
|
|
# File generated without instantiate
|
|
OUTPUT_FILES_NOINST = {
|
|
'platdata':
|
|
OutputFile(Ftype.SOURCE, 'dt-plat.c', DtbPlatdata.generate_plat,
|
|
'Declares the U_BOOT_DRIVER() records and platform data'),
|
|
}
|
|
|
|
# File generated with instantiate
|
|
OUTPUT_FILES_INST = {
|
|
'device':
|
|
OutputFile(Ftype.SOURCE, 'dt-device.c', DtbPlatdata.generate_device,
|
|
'Declares the DM_DEVICE_INST() records'),
|
|
'uclass':
|
|
OutputFile(Ftype.SOURCE, 'dt-uclass.c', DtbPlatdata.generate_uclasses,
|
|
'Declares the uclass instances (struct uclass)'),
|
|
}
|
|
|
|
|
|
def run_steps(args, dtb_file, include_disabled, output, output_dirs, phase,
|
|
instantiate, warning_disabled=False, drivers_additional=None,
|
|
basedir=None, scan=None):
|
|
"""Run all the steps of the dtoc tool
|
|
|
|
Args:
|
|
args (list): List of non-option arguments provided to the problem
|
|
dtb_file (str): Filename of dtb file to process
|
|
include_disabled (bool): True to include disabled nodes
|
|
output (str): Name of output file (None for stdout)
|
|
output_dirs (tuple of str):
|
|
Directory to put C output files
|
|
Directory to put H output files
|
|
phase: The phase of U-Boot that we are generating data for, e.g. 'spl'
|
|
or 'tpl'. None if not known
|
|
instantiate: Instantiate devices so they don't need to be bound at
|
|
run-time
|
|
warning_disabled (bool): True to avoid showing warnings about missing
|
|
drivers
|
|
drivers_additional (list): List of additional drivers to use during
|
|
scanning
|
|
basedir (str): Base directory of U-Boot source code. Defaults to the
|
|
grandparent of this file's directory
|
|
scan (src_src.Scanner): Scanner from a previous run. This can help speed
|
|
up tests. Use None for normal operation
|
|
|
|
Returns:
|
|
DtbPlatdata object
|
|
|
|
Raises:
|
|
ValueError: if args has no command, or an unknown command
|
|
"""
|
|
if not args:
|
|
raise ValueError('Please specify a command: struct, platdata, all')
|
|
if output and output_dirs and any(output_dirs):
|
|
raise ValueError('Must specify either output or output_dirs, not both')
|
|
|
|
if not scan:
|
|
scan = src_scan.Scanner(basedir, drivers_additional, phase)
|
|
scan.scan_drivers()
|
|
do_process = True
|
|
else:
|
|
do_process = False
|
|
plat = DtbPlatdata(scan, dtb_file, include_disabled, instantiate)
|
|
plat.scan_dtb()
|
|
plat.scan_tree(add_root=instantiate)
|
|
plat.prepare_nodes()
|
|
plat.scan_reg_sizes()
|
|
plat.setup_output_dirs(output_dirs)
|
|
plat.scan_structs()
|
|
plat.scan_phandles()
|
|
plat.process_nodes(instantiate)
|
|
plat.read_aliases()
|
|
plat.assign_seqs()
|
|
|
|
# Figure out what output files we plan to generate
|
|
output_files = dict(OUTPUT_FILES_COMMON)
|
|
if instantiate:
|
|
output_files.update(OUTPUT_FILES_INST)
|
|
else:
|
|
output_files.update(OUTPUT_FILES_NOINST)
|
|
|
|
cmds = args[0].split(',')
|
|
if 'all' in cmds:
|
|
cmds = sorted(output_files.keys())
|
|
for cmd in cmds:
|
|
outfile = output_files.get(cmd)
|
|
if not outfile:
|
|
raise ValueError("Unknown command '%s': (use: %s)" %
|
|
(cmd, ', '.join(sorted(output_files.keys()))))
|
|
plat.setup_output(outfile.ftype,
|
|
outfile.fname if output_dirs else output)
|
|
plat.out_header(outfile)
|
|
outfile.method(plat)
|
|
plat.finish_output()
|
|
|
|
if not warning_disabled:
|
|
scan.show_warnings()
|
|
return plat
|