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732f01aabf
Add pinctrl driver for StarFive JH7110 SoC. Signed-off-by: Kuan Lim Lee <kuanlim.lee@linux.starfivetech.com> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com> Tested-by: Conor Dooley <conor.dooley@microchip.com>
113 lines
3 KiB
C
113 lines
3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Pinctrl / GPIO driver for StarFive JH7110 SoC
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*
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* Copyright (C) 2022 StarFive Technology Co., Ltd.
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* Author: Lee Kuan Lim <kuanlim.lee@starfivetech.com>
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* Author: Jianlong Huang <jianlong.huang@starfivetech.com>
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*/
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#include <dm/read.h>
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#include <dm/device_compat.h>
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#include <linux/io.h>
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#include <dt-bindings/pinctrl/pinctrl-starfive-jh7110.h>
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#include "pinctrl-starfive.h"
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#define JH7110_AON_NGPIO 4
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#define JH7110_AON_GC_BASE 64
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/* registers */
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#define JH7110_AON_DOEN 0x0
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#define JH7110_AON_DOUT 0x4
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#define JH7110_AON_GPI 0x8
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#define JH7110_AON_GPIOIN 0x2c
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#define JH7110_AON_GPIOEN 0xc
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#define JH7110_AON_GPIOIS 0x10
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#define JH7110_AON_GPIOIC 0x14
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#define JH7110_AON_GPIOIBE 0x18
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#define JH7110_AON_GPIOIEV 0x1c
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#define JH7110_AON_GPIOIE 0x20
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#define JH7110_AON_GPIORIS 0x28
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#define JH7110_AON_GPIOMIS 0x28
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#define AON_GPO_PDA_0_5_CFG 0x30
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static int jh7110_aon_set_one_pin_mux(struct udevice *dev, unsigned int pin,
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unsigned int din, u32 dout,
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u32 doen, u32 func)
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{
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struct starfive_pinctrl_priv *priv = dev_get_priv(dev);
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if (pin < priv->info->ngpios && func == 0)
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starfive_set_gpiomux(dev, pin, din, dout, doen);
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return 0;
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}
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static int jh7110_aon_get_padcfg_base(struct udevice *dev,
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unsigned int pin)
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{
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if (pin < PAD_GMAC0_MDC)
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return AON_GPO_PDA_0_5_CFG;
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return -1;
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}
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static void jh7110_aon_init_hw(struct udevice *dev)
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{
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struct starfive_pinctrl_priv *priv = dev_get_priv(dev);
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/* mask all GPIO interrupts */
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writel(0, priv->base + JH7110_AON_GPIOIE);
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/* clear edge interrupt flags */
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writel(0, priv->base + JH7110_AON_GPIOIC);
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writel(0x0f, priv->base + JH7110_AON_GPIOIC);
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/* enable GPIO interrupts */
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writel(1, priv->base + JH7110_AON_GPIOEN);
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}
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const struct starfive_pinctrl_soc_info jh7110_aon_pinctrl_info = {
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/* pin conf */
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.set_one_pinmux = jh7110_aon_set_one_pin_mux,
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.get_padcfg_base = jh7110_aon_get_padcfg_base,
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/* gpio dout/doen/din/gpioinput register */
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.dout_reg_base = JH7110_AON_DOUT,
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.dout_mask = GENMASK(3, 0),
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.doen_reg_base = JH7110_AON_DOEN,
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.doen_mask = GENMASK(2, 0),
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.gpi_reg_base = JH7110_AON_GPI,
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.gpi_mask = GENMASK(3, 0),
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.gpioin_reg_base = JH7110_AON_GPIOIN,
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/* gpio */
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.gpio_bank_name = "RGPIO",
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.ngpios = JH7110_AON_NGPIO,
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.gpio_init_hw = jh7110_aon_init_hw,
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};
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static int jh7110_aon_pinctrl_probe(struct udevice *dev)
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{
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struct starfive_pinctrl_soc_info *info =
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(struct starfive_pinctrl_soc_info *)dev_get_driver_data(dev);
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return starfive_pinctrl_probe(dev, info);
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}
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static const struct udevice_id jh7110_aon_pinctrl_ids[] = {
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/* JH7110 aon pinctrl */
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{ .compatible = "starfive,jh7110-aon-pinctrl",
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.data = (ulong)&jh7110_aon_pinctrl_info, },
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{ /* sentinel */ }
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};
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U_BOOT_DRIVER(jh7110_aon_pinctrl) = {
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.name = "jh7110-aon-pinctrl",
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.id = UCLASS_PINCTRL,
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.of_match = jh7110_aon_pinctrl_ids,
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.priv_auto = sizeof(struct starfive_pinctrl_priv),
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.ops = &starfive_pinctrl_ops,
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.probe = jh7110_aon_pinctrl_probe,
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};
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