mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-11 15:37:23 +00:00
eb95aa15e6
The DM365 config was using the 'CONFIG_CMD_SAVEENV' flag. This is already included when we include the config_cmd_default.h header file. So this flag is removed. Also another flag to enable NAND functions was being enabled incorrectly. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
179 lines
5.7 KiB
C
179 lines
5.7 KiB
C
/*
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* Spectrum Digital TMS320DM365 EVM board */
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#define DAVINCI_DM365EVM
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#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */
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#define CONFIG_SKIP_RELOCATE_UBOOT
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#define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */
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#define CONFIG_SYS_CONSOLE_INFO_QUIET
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/* SoC Configuration */
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#define CONFIG_ARM926EJS /* arm926ejs CPU */
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#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
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#define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SOC_DM365
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/* Memory Info */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM_1 0x80000000
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#define PHYS_SDRAM_1_SIZE (128 << 20) /* 128 MiB */
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/* Serial Driver info: UART0 for console */
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE -4
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#define CONFIG_SYS_NS16550_COM1 0x01c20000
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#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BAUDRATE 115200
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/* EEPROM definitions for EEPROM on DM365 EVM */
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
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/* Network Configuration */
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#define CONFIG_DRIVER_TI_EMAC
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#define CONFIG_MII
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#define CONFIG_BOOTP_DEFAULT
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#define CONFIG_BOOTP_DNS
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#define CONFIG_BOOTP_DNS2
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#define CONFIG_BOOTP_SEND_HOSTNAME
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#define CONFIG_NET_RETRY_COUNT 10
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#define CONFIG_NET_MULTI
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/* I2C */
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#define CONFIG_HARD_I2C
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#define CONFIG_DRIVER_DAVINCI_I2C
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#define CONFIG_SYS_I2C_SPEED 400000
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#define CONFIG_SYS_I2C_SLAVE 0x10 /* SMBus host address */
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/* NAND: socketed, two chipselects, normally 2 GBytes */
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#define CONFIG_NAND_DAVINCI
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
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#define CONFIG_SYS_NAND_PAGE_2K
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#define CONFIG_SYS_NAND_LARGEPAGE
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#define CONFIG_SYS_NAND_BASE_LIST { 0x02000000, }
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/* socket has two chipselects, nCE0 gated by address BIT(14) */
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_MAX_CHIPS 2
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/* U-Boot command configuration */
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_BDI
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#undef CONFIG_CMD_FLASH
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_SETGETDCR
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#define CONFIG_CMD_ASKENV
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_I2C
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_SAVES
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#ifdef CONFIG_NAND_DAVINCI
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_MTD_DEVICE
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_UBI
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#define CONFIG_RBTREE
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#endif
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#define CONFIG_CRC32_VERIFY
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#define CONFIG_MX_CYCLIC
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/* U-Boot general configuration */
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#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */
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#define CONFIG_BOOTFILE "uImage" /* Boot file name */
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#define CONFIG_SYS_PROMPT "DM365 EVM # " /* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE /* Print buffer size */ \
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(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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#define CONFIG_SYS_LONGHELP
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#ifdef CONFIG_NAND_DAVINCI
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#define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */
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#define CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_OFFSET 0x3C0000
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#undef CONFIG_ENV_IS_IN_FLASH
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#endif
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_BOOTCOMMAND \
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"dhcp;bootm"
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#define CONFIG_BOOTARGS \
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"console=ttyS0,115200n8 " \
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"root=/dev/mmcblk0p1 rootwait rootfstype=ext3 ro"
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_VERSION_VARIABLE
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#define CONFIG_TIMESTAMP
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/* U-Boot memory configuration */
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#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */
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#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */
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#define CONFIG_SYS_GBL_DATA_SIZE 128 /* for initial data */
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#define CONFIG_SYS_MEMTEST_START 0x87000000 /* physical address */
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#define CONFIG_SYS_MEMTEST_END 0x88000000 /* test 16MB RAM */
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/* Linux interfacing */
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_SYS_BARGSIZE 1024 /* bootarg Size */
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#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */
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/* NAND configuration issocketed with two chipselects just like the DM355 EVM.
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* It normally comes with a 2GByte SLC part with 2KB pages
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* (and 128KB erase blocks); other
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* 2GByte parts may have 4KB pages, 256KB erase blocks, and use MLC. (MLC
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* pretty much demands the 4-bit ECC support.) You can of course swap in
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* other parts, including small page ones.
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*/
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#define MTDIDS_DEFAULT "nand0=davinci_nand.0"
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#ifdef CONFIG_SYS_NAND_LARGEPAGE
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/* Use same layout for 128K/256K blocks; allow some bad blocks */
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#define PART_BOOT "2m(bootloader)ro,"
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#else
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/* Assume 16K erase blocks; allow a few bad ones. */
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#define PART_BOOT "512k(bootloader)ro,"
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#endif
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#define PART_KERNEL "4m(kernel)," /* kernel + initramfs */
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#define PART_REST "-(filesystem)"
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#define MTDPARTS_DEFAULT \
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"mtdparts=davinci_nand.0:" PART_BOOT PART_KERNEL PART_REST
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#endif /* __CONFIG_H */
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