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59000ebe0b
Commit 500327e2ea ("ARM: dts: stm32mp1: DT alignment with Linux kernel v5.8-rc1")
renamed sdmmc2_d47_pins_b phandle to sdmmc2_d47_pins_c, but without updating
the AV96 DT which uses that phandle. Linux missed similar update as well and
it was only added in commit 1ad6e36ec266 ("ARM: dts: stm32: Fix sdmmc2 pins
on AV96") .
Update the AV96 DT pinmux phandle, otherwise eMMC 8bit mode does not work
and access to eMMC takes a very long time to fall back to 4bit mode.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
86 lines
1 KiB
Text
86 lines
1 KiB
Text
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
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/*
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* Copyright (C) 2020 Marek Vasut <marex@denx.de>
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*/
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#include "stm32mp15xx-dhcor-u-boot.dtsi"
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/ {
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aliases {
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mmc0 = &sdmmc1;
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mmc1 = &sdmmc2;
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usb0 = &usbotg_hs;
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};
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config {
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u-boot,boot-led = "led1";
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u-boot,error-led = "led4";
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dh,board-coding-gpios = <&gpiog 13 0>, <&gpiod 9 0>;
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};
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};
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&sdmmc1 {
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u-boot,dm-spl;
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};
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&sdmmc1_b4_pins_a {
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u-boot,dm-spl;
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pins1 {
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u-boot,dm-spl;
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};
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pins2 {
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u-boot,dm-spl;
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};
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};
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&sdmmc1_dir_pins_b {
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u-boot,dm-spl;
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pins1 {
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u-boot,dm-spl;
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};
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pins2 {
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u-boot,dm-spl;
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};
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};
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&sdmmc2 {
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u-boot,dm-spl;
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};
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&sdmmc2_b4_pins_a {
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u-boot,dm-spl;
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pins1 {
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u-boot,dm-spl;
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};
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pins2 {
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u-boot,dm-spl;
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};
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};
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&sdmmc2_d47_pins_c {
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u-boot,dm-spl;
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pins {
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u-boot,dm-spl;
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};
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};
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&uart4 {
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u-boot,dm-pre-reloc;
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};
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&uart4_pins_b {
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u-boot,dm-pre-reloc;
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pins1 {
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u-boot,dm-pre-reloc;
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};
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pins2 {
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u-boot,dm-pre-reloc;
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/delete-property/ bias-disable;
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bias-pull-up;
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};
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};
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&usbotg_hs {
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u-boot,force-b-session-valid;
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hnp-srp-disable;
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};
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