mirror of
https://github.com/AsahiLinux/u-boot
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5ab502cb89
Unlike Linux Kernel, U-Boot historically had *.dts files under board/$(VENDOR)/dts/ and *.dtsi files under arch/$(ARCH)/dts/. I think arch/$(ARCH)/dts dicretory is a better location to store both *.dts and *.dtsi files. For example, before this commit, board/xilinx/dts directory had both Microblaze dts (microblaze-generic.dts) and ARM dts (zynq-*.dts), which are totally unrelated. This commit moves *.dts to arch/$(ARCH)/dts/ directories, allowing us to describe nicely mutiple DTBs generation in the next commit. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
105 lines
2 KiB
Text
105 lines
2 KiB
Text
/dts-v1/;
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#include "tegra20.dtsi"
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/ {
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model = "NVIDIA Tegra20 Harmony evaluation board";
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compatible = "nvidia,harmony", "nvidia,tegra20";
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aliases {
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usb0 = "/usb@c5008000";
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usb1 = "/usb@c5004000";
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sdhci0 = "/sdhci@c8000600";
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sdhci1 = "/sdhci@c8000200";
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};
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memory {
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reg = <0x00000000 0x40000000>;
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};
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host1x {
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status = "okay";
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dc@54200000 {
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status = "okay";
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rgb {
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status = "okay";
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nvidia,panel = <&lcd_panel>;
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};
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};
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};
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serial@70006300 {
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clock-frequency = < 216000000 >;
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};
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nand-controller@70008000 {
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nvidia,wp-gpios = <&gpio 23 0>; /* PC7 */
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nvidia,width = <8>;
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nvidia,timing = <26 100 20 80 20 10 12 10 70>;
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nand@0 {
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reg = <0>;
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compatible = "hynix,hy27uf4g2b", "nand-flash";
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};
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};
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i2c@7000c000 {
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status = "disabled";
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};
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i2c@7000c400 {
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status = "disabled";
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};
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i2c@7000c500 {
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status = "disabled";
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};
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i2c@7000d000 {
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status = "disabled";
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};
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usb@c5000000 {
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status = "disabled";
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};
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usb@c5004000 {
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nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
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};
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sdhci@c8000200 {
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status = "okay";
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cd-gpios = <&gpio 69 1>; /* gpio PI5 */
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wp-gpios = <&gpio 57 0>; /* gpio PH1 */
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power-gpios = <&gpio 155 0>; /* gpio PT3 */
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bus-width = <4>;
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};
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sdhci@c8000600 {
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status = "okay";
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cd-gpios = <&gpio 58 1>; /* gpio PH2 */
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wp-gpios = <&gpio 59 0>; /* gpio PH3 */
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power-gpios = <&gpio 70 0>; /* gpio PI6 */
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bus-width = <8>;
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};
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lcd_panel: panel {
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clock = <42430000>;
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xres = <1024>;
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yres = <600>;
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left-margin = <138>;
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right-margin = <34>;
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hsync-len = <136>;
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lower-margin = <4>;
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upper-margin = <21>;
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vsync-len = <4>;
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hsync-active-high;
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vsyncx-active-high;
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nvidia,bits-per-pixel = <16>;
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nvidia,pwm = <&pwm 0 0>;
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nvidia,backlight-enable-gpios = <&gpio 13 0>; /* PB5 */
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nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */
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nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */
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nvidia,panel-vdd-gpios = <&gpio 22 0>; /* PC6 */
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nvidia,panel-timings = <0 0 200 0 0>;
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};
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};
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