u-boot/arch/x86
Bin Meng c6d4705f41 x86: quark: Configure MTRR to enable cache
Quark SoC does not support MSR MTRRs. Fixed and variable range MTRRs
are accessed indirectly via the message port and not the traditional
MSR mechanism. Only UC, WT and WB cache types are supported.

We configure all the fixed range MTRRs with common values (VGA RAM
as UC, others as WB) and 3 variable range MTRRs for ROM/eSRAM/RAM as
WB, which significantly improves the boot time performance.

With this commit, it takes only 2 seconds for U-Boot to boot to shell
on Intel Galileo board. Previously it took about 6 seconds.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2015-09-16 19:53:53 -06:00
..
cpu x86: quark: Configure MTRR to enable cache 2015-09-16 19:53:53 -06:00
dts x86: galileo: Add PCIe root port IRQ routing 2015-09-16 19:53:53 -06:00
include/asm x86: quark: Configure MTRR to enable cache 2015-09-16 19:53:53 -06:00
lib x86: Generate a valid ACPI table 2015-08-26 07:54:13 -07:00
config.mk efi: Add 64-bit payload support 2015-08-05 08:44:07 -06:00
Kconfig x86: Generate a valid ACPI table 2015-08-26 07:54:13 -07:00
Makefile x86: Add support for U-Boot as an EFI application 2015-08-05 08:44:06 -06:00