mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-14 08:57:58 +00:00
f0600af212
zynq-7000.dtsi include skeleton.dtsi which contains memory node with base address and size zero. If you add memory@0 node to the platform DTS in final DTB there are two memory nodes and U-Boot works with the first one (with zeros) which end up in failing in dram_init because size is zero. Platform memory node should rewrite default memory node setup from skeleton.dtsi that's why platfroms needs to also use memory as node name instead of memory@0. Reported-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
79 lines
1.2 KiB
Text
79 lines
1.2 KiB
Text
/*
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* Xilinx ZC770 XM013 board DTS
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*
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* Copyright (C) 2013 Xilinx, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/dts-v1/;
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#include "zynq-7000.dtsi"
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/ {
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compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000";
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model = "Xilinx Zynq";
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aliases {
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ethernet0 = &gem1;
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i2c0 = &i2c1;
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serial0 = &uart0;
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spi0 = &spi0;
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};
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chosen {
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bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk";
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linux,stdout-path = &uart0;
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stdout-path = &uart0;
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};
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memory {
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device_type = "memory";
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reg = <0x0 0x40000000>;
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};
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};
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&spi0 {
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status = "okay";
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num-cs = <4>;
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is-decoded-cs = <0>;
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eeprom: at25@0 {
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at25,byte-len = <8192>;
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at25,addr-mode = <2>;
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at25,page-size = <32>;
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compatible = "atmel,at25";
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reg = <2>;
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spi-max-frequency = <1000000>;
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};
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};
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&can1 {
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status = "okay";
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};
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&gem1 {
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status = "okay";
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phy-mode = "rgmii-id";
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phy-handle = <ðernet_phy>;
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ethernet_phy: ethernet-phy@7 {
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reg = <7>;
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};
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};
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&i2c1 {
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status = "okay";
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clock-frequency = <400000>;
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si570: clock-generator@55 {
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#clock-cells = <0>;
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compatible = "silabs,si570";
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temperature-stability = <50>;
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reg = <0x55>;
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factory-fout = <156250000>;
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clock-frequency = <148500000>;
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};
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};
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&uart0 {
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status = "okay";
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};
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