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https://github.com/AsahiLinux/u-boot
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3e23794181
Add upower api support, this is modified from upower firmware exported package. Signed-off-by: Peng Fan <peng.fan@nxp.com>
485 lines
12 KiB
C
485 lines
12 KiB
C
// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright 2021 NXP
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*/
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#include <linux/types.h>
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#include <string.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/io.h>
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#include "upower_api.h"
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enum upwr_api_state api_state;
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enum soc_domain pwr_domain;
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void *sh_buffer[UPWR_SG_COUNT];
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struct upwr_code_vers fw_rom_version;
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struct upwr_code_vers fw_ram_version;
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u32 fw_launch_option;
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u32 sg_busy;
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struct mu_type *mu;
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upwr_up_max_msg sg_rsp_msg[UPWR_SG_COUNT];
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upwr_callb user_callback[UPWR_SG_COUNT];
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UPWR_RX_CALLB_FUNC_T sgrp_callback[UPWR_SG_COUNT];
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u32 sg_rsp_siz[UPWR_SG_COUNT];
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#define UPWR_MU_MSG_SIZE (2)
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#define UPWR_SG_BUSY(sg) (sg_busy & (1 << (sg)))
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#define UPWR_USR_CALLB(sg, cb) \
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do { \
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user_callback[sg] = cb; \
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} while (0)
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#define UPWR_MSG_HDR(hdr, sg, fn) \
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(hdr).domain = (u32)pwr_domain; \
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(hdr).srvgrp = sg; \
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(hdr).function = fn
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static u32 upwr_ptr2offset(u64 ptr, enum upwr_sg sg, size_t siz, size_t offset, const void *vptr)
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{
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if (ptr >= UPWR_DRAM_SHARED_BASE_ADDR &&
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((ptr - UPWR_DRAM_SHARED_BASE_ADDR) < UPWR_DRAM_SHARED_SIZE)) {
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return (u32)(ptr - UPWR_DRAM_SHARED_BASE_ADDR);
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}
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/* pointer is outside the shared memory, copy the struct to buffer */
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memcpy(offset + (char *)sh_buffer[sg], (void *)vptr, siz);
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return (u32)((u64)sh_buffer[sg] + offset - UPWR_DRAM_SHARED_BASE_ADDR);
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}
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enum upwr_req_status upwr_req_status(enum upwr_sg sg, u32 *sgfptr, enum upwr_resp *errptr,
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int *retptr)
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{
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enum upwr_req_status status;
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status = (sg_rsp_msg[sg].hdr.errcode == UPWR_RESP_OK) ? UPWR_REQ_OK : UPWR_REQ_ERR;
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return status;
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}
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void upwr_copy2tr(struct mu_type *mu, const u32 *msg, u32 size)
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{
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int i;
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for (i = size - 1; i > -1; i--)
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writel(msg[i], &mu->tr[i]);
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}
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int upwr_tx(const u32 *msg, u32 size)
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{
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if (size > UPWR_MU_MSG_SIZE)
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return -2;
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if (!size)
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return -2;
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if (readl(&mu->tsr) != UPWR_MU_TSR_EMPTY)
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return -1; /* not all TE bits in 1: some data to send still */
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upwr_copy2tr(mu, msg, size);
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writel(1 << (size - 1), &mu->tcr);
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return 0;
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}
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void upwr_srv_req(enum upwr_sg sg, u32 *msg, u32 size)
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{
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sg_busy |= 1 << sg;
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upwr_tx(msg, size);
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}
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int upwr_pwm_power_on(const u32 swton[], const u32 memon[], upwr_callb callb)
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{
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upwr_pwm_pwron_msg txmsg;
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u64 ptrval; /* needed for X86, ARM64 */
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size_t stsize = 0;
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if (api_state != UPWR_API_READY)
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return -3;
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if (UPWR_SG_BUSY(UPWR_SG_PWRMGMT))
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return -1;
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UPWR_USR_CALLB(UPWR_SG_PWRMGMT, callb);
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UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_PWRMGMT, UPWR_PWM_PWR_ON);
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if (!swton)
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txmsg.ptrs.ptr0 = 0; /* NULL pointer -> 0 offset */
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else
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txmsg.ptrs.ptr0 = upwr_ptr2offset(ptrval, UPWR_SG_PWRMGMT,
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(stsize = UPWR_PMC_SWT_WORDS * 4), 0, swton);
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if (!memon)
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txmsg.ptrs.ptr1 = 0; /* NULL pointer -> 0 offset */
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else
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txmsg.ptrs.ptr1 = upwr_ptr2offset(ptrval, UPWR_SG_PWRMGMT, UPWR_PMC_MEM_WORDS * 4,
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stsize, memon);
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upwr_srv_req(UPWR_SG_PWRMGMT, (u32 *)&txmsg, sizeof(txmsg) / 4);
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return 0;
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}
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enum upwr_req_status upwr_poll_req_status(enum upwr_sg sg, u32 *sgfptr,
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enum upwr_resp *errptr, int *retptr,
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u32 attempts)
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{
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u32 i;
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enum upwr_req_status ret;
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if (!attempts) {
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ret = UPWR_REQ_BUSY;
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while (ret == UPWR_REQ_BUSY)
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ret = upwr_req_status(sg, sgfptr, errptr, retptr);
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return ret;
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}
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for (i = 0; i < attempts; i++) {
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ret = upwr_req_status(sg, sgfptr, errptr, retptr);
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if (ret != UPWR_REQ_BUSY)
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break;
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}
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return ret;
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}
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int upwr_xcp_i2c_access(u16 addr, int8_t data_size, uint8_t subaddr_size, u32 subaddr,
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u32 wdata, const upwr_callb callb)
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{
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u64 ptrval = (u64)sh_buffer[UPWR_SG_EXCEPT];
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struct upwr_i2c_access *i2c_acc_ptr = (struct upwr_i2c_access *)ptrval;
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struct upwr_pointer_msg txmsg;
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if (api_state != UPWR_API_READY)
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return -3;
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if (UPWR_SG_BUSY(UPWR_SG_EXCEPT))
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return -1;
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UPWR_USR_CALLB(UPWR_SG_EXCEPT, callb);
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UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_EXCEPT, UPWR_XCP_I2C);
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i2c_acc_ptr->addr = addr;
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i2c_acc_ptr->subaddr = subaddr;
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i2c_acc_ptr->subaddr_size = subaddr_size;
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i2c_acc_ptr->data = wdata;
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i2c_acc_ptr->data_size = data_size;
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txmsg.ptr = upwr_ptr2offset(ptrval,
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UPWR_SG_EXCEPT,
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(size_t)sizeof(struct upwr_i2c_access),
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0,
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i2c_acc_ptr);
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upwr_srv_req(UPWR_SG_EXCEPT, (u32 *)&txmsg, sizeof(txmsg) / 4);
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return 0;
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}
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int upwr_xcp_set_ddr_retention(enum soc_domain domain, u32 enable, const upwr_callb callb)
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{
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union upwr_down_1w_msg txmsg;
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if (api_state != UPWR_API_READY)
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return -3;
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if (UPWR_SG_BUSY(UPWR_SG_EXCEPT))
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return -1;
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UPWR_USR_CALLB(UPWR_SG_EXCEPT, callb);
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UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_EXCEPT, UPWR_XCP_SET_DDR_RETN);
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txmsg.hdr.domain = (u32)domain;
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txmsg.hdr.arg = (u32)enable;
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upwr_srv_req(UPWR_SG_EXCEPT, (u32 *)&txmsg, sizeof(txmsg) / 4);
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return 0;
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}
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int upwr_rx(u32 *msg, u32 *size)
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{
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u32 len = readl(&mu->rsr);
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len = (len == 0x0) ? 0 :
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(len == 0x1) ? 1 :
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#if UPWR_MU_MSG_SIZE > 1
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(len == 0x3) ? 2 :
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#if UPWR_MU_MSG_SIZE > 2
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(len == 0x7) ? 3 :
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#if UPWR_MU_MSG_SIZE > 3
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(len == 0xF) ? 4 :
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#endif
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#endif
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#endif
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0xFFFFFFFF; /* something wrong */
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if (len == 0xFFFFFFFF)
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return -3;
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*size = len;
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if (!len)
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return -1;
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/* copy the received message to the rx queue, so the interrupts are cleared; */
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for (u32 i = 0; i < len; i++)
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msg[i] = readl(&mu->rr[i]);
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return 0;
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}
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void msg_copy(u32 *dest, u32 *src, u32 size)
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{
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*dest = *src;
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if (size > 1)
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*(dest + 1) = *(src + 1);
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}
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void upwr_mu_int_callback(void)
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{
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enum upwr_sg sg; /* service group number */
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UPWR_RX_CALLB_FUNC_T sg_callb; /* service group callback */
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struct upwr_up_2w_msg rxmsg;
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u32 size; /* in words */
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if (upwr_rx((u32 *)&rxmsg, &size) < 0) {
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UPWR_API_ASSERT(0);
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return;
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}
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sg = (enum upwr_sg)rxmsg.hdr.srvgrp;
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/* copy msg to the service group buffer */
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msg_copy((u32 *)&sg_rsp_msg[sg], (u32 *)&rxmsg, size);
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sg_rsp_siz[sg] = size;
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sg_busy &= ~(1 << sg);
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sg_callb = sgrp_callback[sg];
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if (!sg_callb) {
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upwr_callb user_callb = user_callback[sg];
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/* no service group callback; call the user callback if any */
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if (!user_callb)
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goto done; /* no user callback */
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/* make the user callback */
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user_callb(sg, rxmsg.hdr.function, (enum upwr_resp)rxmsg.hdr.errcode,
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(int)(size == 2) ? rxmsg.word2 : rxmsg.hdr.ret);
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goto done;
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}
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/* finally make the group callback */
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sg_callb();
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/* don't uninstall the group callback, it's permanent */
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done:
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if (rxmsg.hdr.errcode == UPWR_RESP_SHUTDOWN) /* shutdown error: */
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api_state = UPWR_API_INITLZED;
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}
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void upwr_txrx_isr(void)
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{
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if (readl(&mu->rsr))
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upwr_mu_int_callback();
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}
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void upwr_start_callb(void)
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{
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switch (api_state) {
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case UPWR_API_START_WAIT:
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{
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upwr_rdy_callb start_callb = (upwr_rdy_callb)user_callback[UPWR_SG_EXCEPT];
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union upwr_ready_msg *msg = (union upwr_ready_msg *)&sg_rsp_msg[UPWR_SG_EXCEPT];
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/* message sanity check */
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UPWR_API_ASSERT(msg->hdr.srvgrp == UPWR_SG_EXCEPT);
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UPWR_API_ASSERT(msg->hdr.function == UPWR_XCP_START);
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UPWR_API_ASSERT(msg->hdr.errcode == UPWR_RESP_OK);
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fw_ram_version.soc_id = fw_rom_version.soc_id;
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fw_ram_version.vmajor = msg->args.vmajor;
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fw_ram_version.vminor = msg->args.vminor;
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fw_ram_version.vfixes = msg->args.vfixes;
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/*
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* vmajor == vminor == vfixes == 0 indicates start error
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* in this case, go back to the INITLZED state
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*/
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if (fw_ram_version.vmajor || fw_ram_version.vminor || fw_ram_version.vfixes) {
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api_state = UPWR_API_READY;
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/* initialization is over: uninstall the callbacks just in case */
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UPWR_USR_CALLB(UPWR_SG_EXCEPT, NULL);
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sgrp_callback[UPWR_SG_EXCEPT] = NULL;
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if (!fw_launch_option) {
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/* launched ROM firmware: RAM fw versions must be all 0s */
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fw_ram_version.vmajor =
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fw_ram_version.vminor =
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fw_ram_version.vfixes = 0;
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}
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} else {
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api_state = UPWR_API_INITLZED;
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}
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start_callb(msg->args.vmajor, msg->args.vminor, msg->args.vfixes);
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}
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break;
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default:
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UPWR_API_ASSERT(0);
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break;
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}
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}
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int upwr_init(enum soc_domain domain, struct mu_type *muptr)
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{
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u32 dom_buffer_base = ((UPWR_API_BUFFER_ENDPLUS + UPWR_API_BUFFER_BASE) / 2);
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union upwr_init_msg *msg = (union upwr_init_msg *)&sg_rsp_msg[UPWR_SG_EXCEPT];
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enum upwr_sg sg; /* service group number */
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u32 size; /* in words */
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int j;
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mu = muptr;
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writel(0, &mu->tcr);
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writel(0, &mu->rcr);
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api_state = UPWR_API_INIT_WAIT;
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pwr_domain = domain;
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sg_busy = 0;
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/* initialize the versions, in case they are polled */
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fw_rom_version.soc_id =
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fw_rom_version.vmajor =
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fw_rom_version.vminor =
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fw_rom_version.vfixes = 0;
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fw_ram_version.soc_id =
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fw_ram_version.vmajor =
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fw_ram_version.vminor =
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fw_ram_version.vfixes = 0;
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sh_buffer[UPWR_SG_EXCEPT] = (void *)(ulong)dom_buffer_base;
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sh_buffer[UPWR_SG_PWRMGMT] = (void *)(ulong)(dom_buffer_base +
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sizeof(union upwr_xcp_union));
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sh_buffer[UPWR_SG_DELAYM] = NULL;
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sh_buffer[UPWR_SG_VOLTM] = NULL;
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sh_buffer[UPWR_SG_CURRM] = NULL;
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sh_buffer[UPWR_SG_TEMPM] = NULL;
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sh_buffer[UPWR_SG_DIAG] = NULL;
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/* (no buffers service groups other than xcp and pwm for now) */
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for (j = 0; j < UPWR_SG_COUNT; j++) {
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user_callback[j] = NULL;
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/* service group Exception gets the initialization callbacks */
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sgrp_callback[j] = (j == UPWR_SG_EXCEPT) ? upwr_start_callb : NULL;
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/* response messages with an initial consistent content */
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sg_rsp_msg[j].hdr.errcode = UPWR_RESP_SHUTDOWN;
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}
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if (readl(&mu->fsr) & BIT(0)) {
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/* send a ping message down to get the ROM version back */
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upwr_xcp_ping_msg ping_msg;
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ping_msg.hdr.domain = pwr_domain;
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ping_msg.hdr.srvgrp = UPWR_SG_EXCEPT;
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ping_msg.hdr.function = UPWR_XCP_PING;
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if (readl(&mu->rsr) & BIT(0)) /* first clean any Rx message left over */
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upwr_rx((u32 *)msg, &size);
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while (readl(&mu->tsr) != UPWR_MU_TSR_EMPTY)
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;
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/*
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* now send the ping message;
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* do not use upwr_tx, which needs API initilized;
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* just write to the MU TR register(s)
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*/
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setbits_le32(&mu->fcr, BIT(0)); /* flag urgency status */
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upwr_copy2tr(mu, (u32 *)&ping_msg, sizeof(ping_msg) / 4);
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}
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do {
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/* poll for the MU Rx status: wait for an init message, either
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* 1st sent from uPower after reset or as a response to a ping
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*/
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while (!readl(&mu->rsr) & BIT(0))
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;
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clrbits_le32(&mu->fcr, BIT(0));
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if (upwr_rx((u32 *)msg, &size) < 0)
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return -4;
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if (size != (sizeof(union upwr_init_msg) / 4)) {
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if (readl(&mu->fsr) & BIT(0))
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continue; /* discard left over msg */
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else
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return -4;
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}
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sg = (enum upwr_sg)msg->hdr.srvgrp;
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if (sg != UPWR_SG_EXCEPT) {
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if (readl(&mu->fsr) & BIT(0))
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continue;
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else
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return -4;
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}
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if ((enum upwr_xcp_f)msg->hdr.function != UPWR_XCP_INIT) {
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if (readl(&mu->fsr) & BIT(0))
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continue;
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else
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return -4;
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}
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break;
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} while (true);
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fw_rom_version.soc_id = msg->args.soc;
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fw_rom_version.vmajor = msg->args.vmajor;
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fw_rom_version.vminor = msg->args.vminor;
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fw_rom_version.vfixes = msg->args.vfixes;
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api_state = UPWR_API_INITLZED;
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return 0;
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} /* upwr_init */
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int upwr_start(u32 launchopt, const upwr_rdy_callb rdycallb)
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{
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upwr_start_msg txmsg;
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if (api_state != UPWR_API_INITLZED)
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return -3;
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UPWR_USR_CALLB(UPWR_SG_EXCEPT, (upwr_callb)rdycallb);
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UPWR_MSG_HDR(txmsg.hdr, UPWR_SG_EXCEPT, UPWR_XCP_START);
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txmsg.hdr.arg = launchopt;
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fw_launch_option = launchopt;
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if (upwr_tx((u32 *)&txmsg, sizeof(txmsg) / 4) < 0) {
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/* catastrophic error, but is it possible to happen? */
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UPWR_API_ASSERT(0);
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return -1;
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}
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api_state = UPWR_API_START_WAIT;
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return 0;
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}
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u32 upwr_rom_version(u32 *vmajor, u32 *vminor, u32 *vfixes)
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{
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u32 soc;
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soc = fw_rom_version.soc_id;
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*vmajor = fw_rom_version.vmajor;
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*vminor = fw_rom_version.vminor;
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*vfixes = fw_rom_version.vfixes;
|
|
|
|
return soc;
|
|
}
|