Peng Fan 4a41a1a6f0 ddr: imx8m: Add DRAM PLL to generate 1000Mhz output ... We will generate DRAM 4000MT/s as default for i.MX8MP. So need DRAM PLL to generate 1000Mhz clock to DDR PHY and controller. Signed-off-by: Peng Fan <peng.fan@nxp.com>		2020-01-08 13:20:08 +01:00
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altera	common: Move some cache and MMU functions out of common.h	2019-12-02 18:23:55 -05:00
fsl	ddr, fsl: add DM_I2C support	2019-08-26 21:16:24 +05:30
imx	ddr: imx8m: Add DRAM PLL to generate 1000Mhz output	2020-01-08 13:20:08 +01:00
marvell	arm: mvebu: Add Marvell's integrated CPUs	2019-04-12 07:04:18 +02:00
microchip	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
Kconfig	drivers: ddr: introduce DDR driver for i.MX8M	2019-01-01 14:12:18 +01:00