Siew Chin Lim 9a5bbdfd1a arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64 ... Create common macro TARGET_SOCFPGA_SOC64 for Stratix10 and Agilex. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>		2021-03-08 10:59:10 +08:00
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Kconfig	arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64	2021-03-08 10:59:10 +08:00
Makefile	ddr: altera: agilex: Add SDRAM driver for Agilex	2020-01-07 14:38:33 +01:00
sdram_agilex.c	common: Drop asm/global_data.h from common header	2021-02-02 15:33:42 -05:00
sdram_arria10.c	common: Drop asm/global_data.h from common header	2021-02-02 15:33:42 -05:00
sdram_gen5.c	dm: Use access methods for dev/uclass private data	2021-01-05 12:24:40 -07:00
sdram_s10.c	common: Drop asm/global_data.h from common header	2021-02-02 15:33:42 -05:00
sdram_s10.h	ddr: altera: Restructure Stratix 10 SDRAM driver	2020-01-07 14:38:33 +01:00
sdram_soc64.c	common: Drop asm/global_data.h from common header	2021-02-02 15:33:42 -05:00
sdram_soc64.h	dm: treewide: Rename ..._platdata variables to just ..._plat	2020-12-13 16:51:09 -07:00
sequencer.c	dm: ddr: socfpga: don't assign values that are not used	2021-02-24 16:51:49 -05:00
sequencer.h	ddr: altera: Add DDR2 support to Gen5 driver	2020-02-05 03:01:57 +01:00