mirror of
https://github.com/AsahiLinux/u-boot
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f1683aa73c
This allows us to use the same DRAM init function on all archs. Add a dummy function for arc, which does not use DRAM init here. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Dummy function on nios2] Signed-off-by: Tom Rini <trini@konsulko.com>
158 lines
3.5 KiB
C
158 lines
3.5 KiB
C
/*
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* (C) Copyright 2004, Psyent Corporation <www.psyent.com>
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* Scott McNutt <smcnutt@psyent.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <cpu.h>
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#include <dm.h>
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#include <errno.h>
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#include <asm/cache.h>
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_DISPLAY_CPUINFO
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int print_cpuinfo(void)
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{
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printf("CPU: Nios-II\n");
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return 0;
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}
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#endif /* CONFIG_DISPLAY_CPUINFO */
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#ifdef CONFIG_ALTERA_SYSID
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int checkboard(void)
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{
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display_sysid();
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return 0;
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}
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#endif
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int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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disable_interrupts();
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/* indirect call to go beyond 256MB limitation of toolchain */
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nios2_callr(gd->arch.reset_addr);
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return 0;
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}
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/*
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* COPY EXCEPTION TRAMPOLINE -- copy the tramp to the
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* exception address. Define CONFIG_ROM_STUBS to prevent
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* the copy (e.g. exception in flash or in other
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* softare/firmware component).
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*/
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#ifndef CONFIG_ROM_STUBS
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static void copy_exception_trampoline(void)
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{
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extern int _except_start, _except_end;
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void *except_target = (void *)gd->arch.exception_addr;
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if (&_except_start != except_target) {
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memcpy(except_target, &_except_start,
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&_except_end - &_except_start);
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flush_cache(gd->arch.exception_addr,
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&_except_end - &_except_start);
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}
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}
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#endif
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int arch_cpu_init_dm(void)
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{
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struct udevice *dev;
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int ret;
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ret = uclass_first_device_err(UCLASS_CPU, &dev);
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if (ret)
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return ret;
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gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
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#ifndef CONFIG_ROM_STUBS
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copy_exception_trampoline();
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#endif
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return 0;
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}
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static int altera_nios2_get_desc(struct udevice *dev, char *buf, int size)
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{
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const char *cpu_name = "Nios-II";
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if (size < strlen(cpu_name))
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return -ENOSPC;
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strcpy(buf, cpu_name);
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return 0;
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}
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static int altera_nios2_get_info(struct udevice *dev, struct cpu_info *info)
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{
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info->cpu_freq = gd->cpu_clk;
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info->features = (1 << CPU_FEAT_L1_CACHE) |
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(gd->arch.has_mmu ? (1 << CPU_FEAT_MMU) : 0);
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return 0;
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}
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static int altera_nios2_get_count(struct udevice *dev)
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{
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return 1;
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}
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static int altera_nios2_probe(struct udevice *dev)
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{
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const void *blob = gd->fdt_blob;
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int node = dev_of_offset(dev);
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gd->cpu_clk = fdtdec_get_int(blob, node,
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"clock-frequency", 0);
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gd->arch.dcache_line_size = fdtdec_get_int(blob, node,
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"dcache-line-size", 0);
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gd->arch.icache_line_size = fdtdec_get_int(blob, node,
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"icache-line-size", 0);
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gd->arch.dcache_size = fdtdec_get_int(blob, node,
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"dcache-size", 0);
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gd->arch.icache_size = fdtdec_get_int(blob, node,
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"icache-size", 0);
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gd->arch.reset_addr = fdtdec_get_int(blob, node,
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"altr,reset-addr", 0);
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gd->arch.exception_addr = fdtdec_get_int(blob, node,
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"altr,exception-addr", 0);
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gd->arch.has_initda = fdtdec_get_int(blob, node,
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"altr,has-initda", 0);
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gd->arch.has_mmu = fdtdec_get_int(blob, node,
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"altr,has-mmu", 0);
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gd->arch.io_region_base = gd->arch.has_mmu ? 0xe0000000 : 0x80000000;
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gd->arch.mem_region_base = gd->arch.has_mmu ? 0xc0000000 : 0x00000000;
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gd->arch.physaddr_mask = gd->arch.has_mmu ? 0x1fffffff : 0x7fffffff;
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return 0;
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}
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static const struct cpu_ops altera_nios2_ops = {
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.get_desc = altera_nios2_get_desc,
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.get_info = altera_nios2_get_info,
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.get_count = altera_nios2_get_count,
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};
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static const struct udevice_id altera_nios2_ids[] = {
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{ .compatible = "altr,nios2-1.0" },
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{ .compatible = "altr,nios2-1.1" },
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{ }
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};
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U_BOOT_DRIVER(altera_nios2) = {
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.name = "altera_nios2",
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.id = UCLASS_CPU,
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.of_match = altera_nios2_ids,
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.probe = altera_nios2_probe,
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.ops = &altera_nios2_ops,
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.flags = DM_FLAG_PRE_RELOC,
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};
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/* This is a dummy function on nios2 */
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int dram_init(void)
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{
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return 0;
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}
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