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bb922ca3eb
Use proper project name in DTs, messages and READMEs. Signed-off-by: Michal Simek <michal.simek@amd.com>
58 lines
1.9 KiB
Text
58 lines
1.9 KiB
Text
Overview
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--------
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QorIQ LS1012A FREEDOM (LS1012AFRDM) is a high-performance development
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platform, with a complete debugging environment. The LS1012AFRDM board
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supports the QorIQ LS1012A processor and is optimized to support the
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high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports.
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LS1012A SoC Overview
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--------------------
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Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS2080A
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SoC overview.
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LS1012AFRDM board Overview
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-----------------------
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- SERDES Connections, 2 lanes supportingspeeds upto 1 Gbit/s
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- 2 SGMII 1G PHYs
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- DDR Controller
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- 4 Gb DDR3L SDRAM memory, running at data rates up to 1 GT/s
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operating at 1.35 V
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- QSPI
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- Onboard 512 Mbit QSPI flash memory running at speed up
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to 108/54 MHz
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- One high-speed USB 2.0/3.0 port, one USB 2.0 port
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- USB 2.0/3.0 port is configured as On-The-Go (OTG) with a
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Micro-AB connector.
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- USB 2.0 port is a debug port (CMSIS DAP) and is configured
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as a Micro-AB device.
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- I2C controller
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- One I2C bus with connectivity to Arduino headers
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- UART
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- UART (Console): UART1 (Without flow control) for console
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- ARM JTAG support
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- ARM Cortex® 10-pin JTAG connector for LS1012A
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- CMSIS DAP through K20 microcontroller
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- SAI Audio interface
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- One SAI port, SAI 2 with full duplex support
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- Clocks
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- 25 MHz crystal for LS1012A
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- 8 MHz Crystal for K20
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- 24 MHz for SC16IS740IPW SPI to Dual UART bridge
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- Power Supplies
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- 5 V input supply from USB
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- 0.9 V, 1.35 V, and 1.8 V for VDD/Core, DDR, I/O, and
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other board interfaces
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Booting Options
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---------------
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QSPI Flash 1
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QSPI flash map
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--------------
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Images | Size |QSPI Flash Address
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------------------------------------------
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RCW + PBI | 1MB | 0x4000_0000
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U-Boot | 1MB | 0x4010_0000
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U-Boot Env | 1MB | 0x4020_0000
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PPA FIT image | 2MB | 0x4050_0000
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Linux ITB | ~53MB | 0x40A0_0000
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