Sean Anderson c41045411b Revert "riscv: Clear pending interrupts before enabling IPIs" ... Clearing MIP.MSIP is not guaranteed to do anything by the spec. In addition, most existing RISC-V hardware does nothing when this bit is set. The following commits "riscv: Use a valid bit to ignore already-pending IPIs" and "riscv: Clear pending IPIs on initialization" should implement the original intent of the reverted commit in a more robust manner. This reverts commit 9472630337. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com>		2020-09-30 08:54:52 +08:00
..
arc	board_f: Factor out bdinfo bi_mem{start, size} to setup_bdinfo	2020-08-06 14:26:35 -04:00
arm	Xilinx changes for v2021.01	2020-09-24 08:33:47 -04:00
m68k	board_f: m68k: Factor out m68k-specific bdinfo setup	2020-08-06 14:26:35 -04:00
microblaze	microblaze: Add support for little/big endian in/out api's	2020-09-23 10:31:40 +02:00
mips	global: Move from bi_memstart/memsize -> gd->ram_base/ram_size	2020-08-26 09:19:34 +02:00
nds32	treewide: convert bd_t to struct bd_info by coccinelle	2020-07-17 09:30:13 -04:00
nios2	cpu: Convert the methods to use a const udevice *	2020-07-25 14:46:57 -06:00
powerpc	board/freescale: Remove P5020DS board support	2020-09-24 08:27:44 -04:00
riscv	Revert "riscv: Clear pending interrupts before enabling IPIs"	2020-09-30 08:54:52 +08:00
sandbox	timer: Add a test for timer_timebase_fallback	2020-09-30 08:54:45 +08:00
sh	sh: r2dplus: Add SCIF1 to the basic DT	2020-08-02 19:58:27 +02:00
x86	x86: edison: Generate an image suitable for xFSTK	2020-09-25 11:27:28 +08:00
xtensa	xtensa: Remove arch_setup_bdinfo()	2020-08-26 09:19:40 +02:00
.gitignore
Kconfig	arc: Kconfig: Add missing DM dependency	2020-08-27 11:26:58 -04:00
u-boot-elf.lds	arch: Add explicit linker script for u-boot-elf	2020-04-03 11:52:55 -04:00