mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-16 17:58:23 +00:00
6dd652fa4d
- Hymod board database mods: add "who" field and new xilinx chip types
- provide new "init_cmd_timeout()" function so code external to
"common/main.c" can use the "reset_cmd_timeout()" function before
entering the main loop
- add DTT support for adm1021 (new file dtt/adm1021.c; config
slightly different. see include/configs/hymod.h for an example
(requires CONFIG_DTT_ADM1021, CONFIG_DTT_SENSORS, and
CFG_DTT_ADM1021 defined)
- add new "eeprom_probe()" function which has similar args and
behaves in a similar way to "eeprom_read()" etc.
- add 8260 FCC ethernet loopback code (new "eth_loopback_test()"
function which is enabled by defining CONFIG_ETHER_LOOPBACK_TEST)
- gdbtools copyright update
- ensure that set_msr() executes the "sync" and "isync" instructions
after the "mtmsr" instruction in cpu/mpc8260/interrupts.c
- 8260 I/O ports fix: Open Drain should be set last when configuring
- add SIU IRQ defines for 8260
- allow LDSCRIPT override and OBJCFLAGS initialization: change to
config.mk to allow board configurations to override the GNU
linker script, selected via the LDSCRIPT, make variable, and to
give an initial value to the OBJCFLAGS make variable
- 8260 i2c enhancement:
o correctly extends the timeout depending on the size of all
queued messages for both transmit and receive
o will not continue with receive if transmit times out
o ensures that the error callback is done for all queued tx
and rx messages
o correctly detects both tx and rx timeouts, only delivers one to
the callback, and does not overwrite an earlier error
o logic in i2c_probe now correct
- add "vprintf()" function so that "panic()" function can be
technically correct
- many Hymod board changes
48 lines
1.7 KiB
C
48 lines
1.7 KiB
C
#ifndef _MPC8260_IRQ_H
|
|
#define _MPC8260_IRQ_H
|
|
|
|
/****************************************************************************/
|
|
/* most of this was ripped out of include/asm-ppc/irq.h from the Linux/PPC */
|
|
/* source. There was no copyright information in the file. */
|
|
|
|
/*
|
|
* this is the # irq's for all ppc arch's (pmac/chrp/prep)
|
|
* so it is the max of them all
|
|
*
|
|
* [let's just worry about 8260 for now - mjj]
|
|
*/
|
|
#define NR_IRQS 64
|
|
|
|
/* The 8260 has an internal interrupt controller with a maximum of
|
|
* 64 IRQs. We will use NR_IRQs from above since it is large enough.
|
|
* Don't be confused by the 8260 documentation where they list an
|
|
* "interrupt number" and "interrupt vector". We are only interested
|
|
* in the interrupt vector. There are "reserved" holes where the
|
|
* vector number increases, but the interrupt number in the table does not.
|
|
* (Document errata updates have fixed this...make sure you have up to
|
|
* date processor documentation -- Dan).
|
|
*/
|
|
#define NR_SIU_INTS 64
|
|
|
|
/* There are many more than these, we will add them as we need them.
|
|
*/
|
|
#define SIU_INT_SMC1 ((uint)0x04)
|
|
#define SIU_INT_SMC2 ((uint)0x05)
|
|
#define SIU_INT_IRQ1 ((uint)0x13)
|
|
#define SIU_INT_IRQ2 ((uint)0x14)
|
|
#define SIU_INT_IRQ3 ((uint)0x15)
|
|
#define SIU_INT_IRQ4 ((uint)0x16)
|
|
#define SIU_INT_IRQ5 ((uint)0x17)
|
|
#define SIU_INT_IRQ6 ((uint)0x18)
|
|
#define SIU_INT_IRQ7 ((uint)0x19)
|
|
#define SIU_INT_FCC1 ((uint)0x20)
|
|
#define SIU_INT_FCC2 ((uint)0x21)
|
|
#define SIU_INT_FCC3 ((uint)0x22)
|
|
#define SIU_INT_SCC1 ((uint)0x28)
|
|
#define SIU_INT_SCC2 ((uint)0x29)
|
|
#define SIU_INT_SCC3 ((uint)0x2a)
|
|
#define SIU_INT_SCC4 ((uint)0x2b)
|
|
|
|
#define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
|
|
|
|
#endif /* _MPC8260_IRQ_H */
|