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The patch enables spread spectrum clocking (SSC) for MPU and LCD PLLs. As reported by the TI spruh73x/spruhl7x RM, SSC is only supported for the DISP/LCD and MPU PLLs on am33xx/am43xx. SSC is not supported for DDR, PER, and CORE PLLs. Calculating the required values and setting the registers accordingly was taken from the set_mpu_spreadspectrum routine contained in the arch/arm/mach-omap2/am33xx/clock_am33xx.c file of the u-boot project. In locked condition, DPLL output clock = CLKINP *[M/N]. In case of SSC enabled, the reference manual explains that there is a restriction of range of M values. Since the clk_ti_am3_dpll_round_rate() attempts to select the minimum possible N, the value of M obtained is not guaranteed to be within the range required. With the new "ti,min-div" parameter it is possible to increase N and consequently M to satisfy the constraint imposed by SSC. Link: https://lore.kernel.org/r/20210606202253.31649-6-dariobin@libero.it Signed-off-by: Dario Binacchi <dariobin@libero.it> |
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.. | ||
clk-am3-dpll-x2.c | ||
clk-am3-dpll.c | ||
clk-ctrl.c | ||
clk-divider.c | ||
clk-gate.c | ||
clk-k3-pll.c | ||
clk-k3.c | ||
clk-mux.c | ||
clk-sci.c | ||
clk.c | ||
clk.h | ||
Kconfig | ||
Makefile | ||
omap4-cm.c |