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https://github.com/AsahiLinux/u-boot
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c3a879510a
Prepares for the addition of the IOT2050 board which is based on the TI AM65x. The board comes in four variants, Basic and Advanced, each as product generation 1 (SR1.0) and 2 (SR2.x), so there are separate dts files needed. Furthermore, the SPL has its own device tree. Based on original board support by Le Jin, Gao Nian and Chao Zeng. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
51 lines
1.2 KiB
Text
51 lines
1.2 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) Siemens AG, 2021
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*
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* Authors:
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* Chao Zeng <chao.zeng@siemens.com>
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* Jan Kiszka <jan.kiszka@siemens.com>
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*
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* Common bits of the IOT2050 Basic and Advanced variants, PG2
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*/
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&main_pmx0 {
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cp2102n_reset_pin_default: cp2102n-reset-pin-default {
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pinctrl-single,pins = <
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/* (AF12) GPIO1_24, used as cp2102 reset */
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AM65X_IOPAD(0x01e0, PIN_OUTPUT, 7)
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>;
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};
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};
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&main_gpio1 {
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pinctrl-names = "default";
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pinctrl-0 = <&cp2102n_reset_pin_default>;
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gpio-line-names =
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"", "", "", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "", "", "",
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"", "", "", "", "CP2102N-RESET";
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};
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&dss {
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/* Workaround needed to get DP clock of 154Mhz */
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assigned-clocks = <&k3_clks 67 0>;
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};
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&serdes0 {
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assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>;
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assigned-clock-parents = <&k3_clks 153 7>, <&k3_clks 153 4>;
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};
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&dwc3_0 {
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assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
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<&k3_clks 151 8>; /* set PIPE3_TXB_CLK to WIZ8B2M4VSB */
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phys = <&serdes0 PHY_TYPE_USB3 0>;
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phy-names = "usb3-phy";
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};
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&usb0_phy {
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maximum-speed = "super-speed";
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snps,dis-u1-entry-quirk;
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snps,dis-u2-entry-quirk;
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};
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