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https://github.com/AsahiLinux/u-boot
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a184fb8e96
The driver for Linux is out of control of Socionext, so set up reset / clock in here. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
29 lines
509 B
C
29 lines
509 B
C
/*
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* Copyright (C) 2017 Socionext Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <linux/bitops.h>
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#include <linux/io.h>
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#include "../init.h"
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#include "../sc64-regs.h"
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#define SDCTRL_EMMC_HW_RESET 0x59810280
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void uniphier_pxs3_clk_init(void)
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{
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u32 tmp;
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tmp = readl(SC_RSTCTRL6);
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tmp |= BIT(8); /* Mali */
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writel(tmp, SC_RSTCTRL6);
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tmp = readl(SC_CLKCTRL6);
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tmp |= BIT(8); /* Mali */
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writel(tmp, SC_CLKCTRL6);
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/* TODO: use "mmc-pwrseq-emmc" */
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writel(1, SDCTRL_EMMC_HW_RESET);
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}
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