mirror of
https://github.com/AsahiLinux/u-boot
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190 lines
4 KiB
Makefile
190 lines
4 KiB
Makefile
#
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# (C) Copyright 2000-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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ifeq ($(ARCH),ppc)
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LOAD_ADDR = 0x40000
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endif
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ifeq ($(ARCH),i386)
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LOAD_ADDR = 0x40000
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endif
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ifeq ($(ARCH),arm)
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ifeq ($(BOARD),omap2420h4)
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LOAD_ADDR = 0x80300000
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else
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LOAD_ADDR = 0xc100000
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endif
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endif
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ifeq ($(ARCH),mips)
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LOAD_ADDR = 0x80200000 -T mips.lds
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endif
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ifeq ($(ARCH),nios)
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LOAD_ADDR = 0x00800000 -L $(gcclibdir)/m32 -T nios.lds
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endif
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ifeq ($(ARCH),nios2)
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LOAD_ADDR = 0x02000000 -L $(gcclibdir) -T nios2.lds
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endif
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ifeq ($(ARCH),m68k)
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LOAD_ADDR = 0x20000 -L $(clibdir)
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endif
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ifeq ($(ARCH),microblaze)
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LOAD_ADDR = 0x80F00000
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endif
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ifeq ($(ARCH),blackfin)
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LOAD_ADDR = 0x1000
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endif
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ifeq ($(ARCH),avr32)
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LOAD_ADDR = 0x00000000
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endif
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ifeq ($(ARCH),sh)
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LOAD_ADDR = 0x8C000000
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endif
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ifeq ($(ARCH),sparc)
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LOAD_ADDR = 0x00000000 -L $(gcclibdir) -T sparc.lds
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endif
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include $(TOPDIR)/config.mk
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ELF = hello_world
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SREC = hello_world.srec
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BIN = hello_world.bin
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ifeq ($(CPU),mpc8xx)
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ELF += test_burst
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SREC += test_burst.srec
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BIN += test_burst.bin
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endif
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ifeq ($(ARCH),i386)
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ELF += 82559_eeprom
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SREC += 82559_eeprom.srec
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BIN += 82559_eeprom.bin
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endif
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ifeq ($(ARCH),ppc)
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ELF += sched
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SREC += sched.srec
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BIN += sched.bin
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endif
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ifeq ($(ARCH),blackfin)
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ELF += smc91111_eeprom
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SREC += smc91111_eeprom.srec
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BIN += smc91111_eeprom.bin
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endif
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# The following example is pretty 8xx specific...
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ifeq ($(CPU),mpc8xx)
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ELF += timer
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SREC += timer.srec
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BIN += timer.bin
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endif
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# The following example is 8260 specific...
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ifeq ($(CPU),mpc8260)
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ELF += mem_to_mem_idma2intr
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SREC += mem_to_mem_idma2intr.srec
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BIN += mem_to_mem_idma2intr.bin
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endif
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# Demo for 52xx IRQs
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ifeq ($(CPU),mpc5xxx)
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ELF += interrupt
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SREC += interrupt.srec
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BIN += interrupt.bin
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endif
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# Utility for resetting i82559 EEPROM
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ifeq ($(BOARD),oxc)
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ELF += eepro100_eeprom
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SREC += eepro100_eeprom.srec
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BIN += eepro100_eeprom.bin
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endif
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ifeq ($(BIG_ENDIAN),y)
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EX_LDFLAGS += -EB
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endif
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COBJS := $(SREC:.srec=.o)
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LIB = $(obj)libstubs.a
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LIBAOBJS=
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ifeq ($(ARCH),ppc)
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LIBAOBJS+= $(ARCH)_longjmp.o $(ARCH)_setjmp.o
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endif
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ifeq ($(CPU),mpc8xx)
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LIBAOBJS+= test_burst_lib.o
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endif
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LIBCOBJS= stubs.o
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LIBOBJS = $(addprefix $(obj),$(LIBAOBJS) $(LIBCOBJS))
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SRCS := $(COBJS:.o=.c) $(LIBCOBJS:.o=.c) $(if $(LIBAOBJS),$(LIBAOBJS:.o=.S))
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OBJS := $(addprefix $(obj),$(COBJS))
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ELF := $(addprefix $(obj),$(ELF))
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BIN := $(addprefix $(obj),$(BIN))
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SREC := $(addprefix $(obj),$(SREC))
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gcclibdir := $(shell dirname `$(CC) -print-libgcc-file-name`)
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clibdir := $(shell dirname `$(CC) $(CFLAGS) -print-file-name=libc.a`)
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CPPFLAGS += -I..
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all: $(obj).depend $(OBJS) $(LIB) $(SREC) $(BIN) $(ELF)
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#########################################################################
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$(LIB): $(obj).depend $(LIBOBJS)
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$(AR) $(ARFLAGS) $@ $(LIBOBJS)
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$(ELF):
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$(obj)%: $(obj)%.o $(LIB)
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$(LD) -g $(EX_LDFLAGS) -Ttext $(LOAD_ADDR) \
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-o $@ -e $(SYM_PREFIX)$(notdir $(<:.o=)) $< $(LIB) \
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-L$(gcclibdir) -lgcc
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$(SREC):
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$(obj)%.srec: $(obj)%
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$(OBJCOPY) -O srec $< $@ 2>/dev/null
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$(BIN):
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$(obj)%.bin: $(obj)%
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$(OBJCOPY) -O binary $< $@ 2>/dev/null
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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