mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-17 02:08:38 +00:00
55b3ba4c2b
This is a little tricky since SoCFPGA has code to determine this as runtime. Introduce a guard variable for platforms to select if they have a static value to use. Then for ARCH_SOCFPGA, call cm_get_qspi_controller_clk_hz() and otherwise continue the previous behavior. Cc: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Tom Rini <trini@konsulko.com>
126 lines
3 KiB
Text
126 lines
3 KiB
Text
CONFIG_ARM=y
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CONFIG_ARCH_K3=y
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CONFIG_TI_SECURE_DEVICE=y
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CONFIG_SYS_MALLOC_LEN=0x2000000
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CONFIG_SYS_MALLOC_F_LEN=0x55000
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CONFIG_SPL_GPIO=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SOC_K3_J721E=y
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CONFIG_TARGET_J721E_R5_EVM=y
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CONFIG_ENV_SIZE=0x20000
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CONFIG_ENV_OFFSET=0x680000
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CONFIG_DM_GPIO=y
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CONFIG_SPL_DM_SPI=y
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CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-r5-common-proc-board"
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CONFIG_SPL_TEXT_BASE=0x41c00000
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CONFIG_SPL_MMC=y
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CONFIG_SPL_SERIAL=y
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CONFIG_SPL_DRIVERS_MISC=y
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CONFIG_SPL_STACK_R_ADDR=0x82000000
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CONFIG_ENV_OFFSET_REDUND=0x700000
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CONFIG_SPL_FS_FAT=y
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CONFIG_SPL_LIBDISK_SUPPORT=y
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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CONFIG_SPL_SPI=y
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_SPL_LOAD_FIT=y
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CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000
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CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
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# CONFIG_USE_SPL_FIT_GENERATOR is not set
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CONFIG_USE_BOOTCOMMAND=y
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_SPL_STACK_R=y
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CONFIG_SPL_SEPARATE_BSS=y
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CONFIG_SPL_EARLY_BSS=y
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CONFIG_SPL_DMA=y
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_DM_MAILBOX=y
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CONFIG_SPL_DM_SPI_FLASH=y
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CONFIG_SPL_DM_RESET=y
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CONFIG_SPL_POWER_DOMAIN=y
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CONFIG_SPL_RAM_SUPPORT=y
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CONFIG_SPL_RAM_DEVICE=y
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CONFIG_SPL_REMOTEPROC=y
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# CONFIG_SPL_SPI_FLASH_TINY is not set
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CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
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CONFIG_SPL_SPI_LOAD=y
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CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
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CONFIG_SPL_YMODEM_SUPPORT=y
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CONFIG_HUSH_PARSER=y
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_GPT=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_REMOTEPROC=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_TIME=y
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CONFIG_CMD_FAT=y
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CONFIG_OF_CONTROL=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_ENV_OVERWRITE=y
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SYS_MMC_ENV_PART=1
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CONFIG_DM=y
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CONFIG_SPL_DM=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_REGMAP=y
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CONFIG_SPL_REGMAP=y
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CONFIG_SPL_OF_TRANSLATE=y
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CONFIG_CLK=y
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CONFIG_SPL_CLK=y
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CONFIG_CLK_TI_SCI=y
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CONFIG_DMA_CHANNELS=y
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CONFIG_TI_K3_NAVSS_UDMA=y
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CONFIG_TI_SCI_PROTOCOL=y
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CONFIG_DA8XX_GPIO=y
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CONFIG_DM_I2C=y
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CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
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CONFIG_SYS_I2C_OMAP24XX=y
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CONFIG_DM_MAILBOX=y
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CONFIG_K3_SEC_PROXY=y
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CONFIG_FS_LOADER=y
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CONFIG_SPL_FS_LOADER=y
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CONFIG_K3_AVS0=y
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CONFIG_MMC_SDHCI=y
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CONFIG_SPL_MMC_SDHCI_ADMA=y
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CONFIG_MMC_SDHCI_AM654=y
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CONFIG_MTD=y
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH_SFDP_SUPPORT=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_PINCTRL=y
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# CONFIG_PINCTRL_GENERIC is not set
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CONFIG_SPL_PINCTRL=y
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# CONFIG_SPL_PINCTRL_GENERIC is not set
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CONFIG_PINCTRL_SINGLE=y
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CONFIG_POWER_DOMAIN=y
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CONFIG_TI_SCI_POWER_DOMAIN=y
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CONFIG_DM_PMIC=y
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CONFIG_PMIC_TPS65941=y
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CONFIG_DM_REGULATOR=y
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CONFIG_SPL_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_TPS65941=y
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CONFIG_K3_SYSTEM_CONTROLLER=y
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CONFIG_REMOTEPROC_TI_K3_ARM64=y
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CONFIG_DM_RESET=y
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CONFIG_RESET_TI_SCI=y
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CONFIG_DM_SERIAL=y
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CONFIG_SOC_DEVICE=y
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CONFIG_SOC_DEVICE_TI_K3=y
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CONFIG_SOC_TI=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_CADENCE_QSPI=y
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CONFIG_HAS_CQSPI_REF_CLK=y
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CONFIG_CQSPI_REF_CLK=133333333
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CONFIG_SYSRESET=y
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CONFIG_SPL_SYSRESET=y
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CONFIG_SYSRESET_TI_SCI=y
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CONFIG_TIMER=y
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CONFIG_SPL_TIMER=y
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CONFIG_OMAP_TIMER=y
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CONFIG_FS_EXT4=y
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CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
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