u-boot/arch/x86/dts/qemu-x86_q35.dts
Simon Glass f2b85ab5e6 dm: x86: spi: Convert ICH SPI driver to driver model PCI API
At present this SPI driver works by searching the PCI buses for its
peripheral. It also uses the legacy PCI API.

In addition the driver has code to determine the type of Intel PCH that is
used (version 7 or version 9). Now that we have proper PCH drivers we can
use those to obtain the information we need.

While the device tree has a node for the SPI peripheral it is not in the
right place. It should be on the PCI bus as a sub-peripheral of the LPC
device.

Update the device tree files to show the SPI controller within the PCH, so
that PCI access works as expected.

This patch includes Bin's fix-up patch from here:

   https://patchwork.ozlabs.org/patch/569478/

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2016-01-24 12:07:17 +08:00

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1.6 KiB
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/*
* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include <dt-bindings/interrupt-router/intel-irq.h>
/* ICH9 IRQ router has discrete PIRQ control registers */
#undef PIRQE
#undef PIRQF
#undef PIRQG
#undef PIRQH
#define PIRQE 8
#define PIRQF 9
#define PIRQG 10
#define PIRQH 11
/include/ "skeleton.dtsi"
/include/ "serial.dtsi"
/include/ "keyboard.dtsi"
/include/ "rtc.dtsi"
/include/ "tsc_timer.dtsi"
/ {
model = "QEMU x86 (Q35)";
compatible = "qemu,x86";
config {
silent_console = <0>;
u-boot,no-apm-finalize;
};
chosen {
stdout-path = "/serial";
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "cpu-qemu";
reg = <0>;
intel,apic-id = <0>;
};
};
tsc-timer {
clock-frequency = <1000000000>;
};
pci {
compatible = "pci-x86";
#address-cells = <3>;
#size-cells = <2>;
u-boot,dm-pre-reloc;
ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000
0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
0x01000000 0x0 0x2000 0x2000 0 0xe000>;
pch@1f,0 {
reg = <0x0000f800 0 0 0 0>;
compatible = "intel,pch9";
irq-router {
compatible = "intel,irq-router";
intel,pirq-config = "pci";
intel,pirq-link = <0x60 8>;
intel,pirq-mask = <0x0e40>;
intel,pirq-routing = <
/* e1000 NIC */
PCI_BDF(0, 2, 0) INTA PIRQG
/* ICH9 UHCI */
PCI_BDF(0, 29, 0) INTA PIRQA
PCI_BDF(0, 29, 1) INTB PIRQB
PCI_BDF(0, 29, 2) INTC PIRQC
/* ICH9 EHCI */
PCI_BDF(0, 29, 7) INTD PIRQD
/* ICH9 SATA */
PCI_BDF(0, 31, 2) INTA PIRQA
>;
};
};
};
};