mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-09-30 03:12:07 +00:00
2564fce7ee
According to their TRMs, Cortex ARMv7 CPUs with SMP support require the ACTLR.SMPEN bit to be set as early as possible, before any cache or TLB maintenance operations are done. As we do those things still in start.S, we need to move the SMPEN bit setting there, too. This introduces a new ARMv7 wide symbol and code to set bit 6 in ACTLR very early in start.S, and moves sunxi boards over to use that instead of the custom code we had in our board.c file (where it was called technically too late). In practice we got away with this so far, because at this point all the other cores were still in reset, so any broadcasting would have been ignored anyway. But it is architecturally cleaner to do it early, and we move a core specific piece of code out of board.c. This also gets rid of the ARM_CORTEX_CPU_IS_UP kludge I introduced a few years back, and moves the respective logic into the new Kconfig entry. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
84 lines
2 KiB
Text
84 lines
2 KiB
Text
if CPU_V7A
|
|
|
|
config CPU_V7_HAS_NONSEC
|
|
bool
|
|
|
|
config CPU_V7_HAS_VIRT
|
|
bool
|
|
|
|
config ARCH_SUPPORT_PSCI
|
|
bool
|
|
|
|
config ARMV7_NONSEC
|
|
bool "Enable support for booting in non-secure mode" if EXPERT
|
|
depends on CPU_V7_HAS_NONSEC
|
|
default y
|
|
---help---
|
|
Say Y here to enable support for booting in non-secure / SVC mode.
|
|
|
|
config ARMV7_BOOT_SEC_DEFAULT
|
|
bool "Boot in secure mode by default" if EXPERT
|
|
depends on ARMV7_NONSEC
|
|
default y if ARCH_TEGRA
|
|
---help---
|
|
Say Y here to boot in secure mode by default even if non-secure mode
|
|
is supported. This option is useful to boot kernels which do not
|
|
suppport booting in non-secure mode. Only set this if you need it.
|
|
This can be overridden at run-time by setting the bootm_boot_mode env.
|
|
variable to "sec" or "nonsec".
|
|
|
|
config ARMV7_VIRT
|
|
bool "Enable support for hardware virtualization" if EXPERT
|
|
depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC
|
|
default y
|
|
---help---
|
|
Say Y here to boot in hypervisor (HYP) mode when booting non-secure.
|
|
|
|
config ARMV7_PSCI
|
|
bool "Enable PSCI support" if EXPERT
|
|
depends on ARMV7_NONSEC && ARCH_SUPPORT_PSCI
|
|
default y
|
|
help
|
|
Say Y here to enable PSCI support.
|
|
|
|
choice
|
|
prompt "Supported PSCI version"
|
|
depends on ARMV7_PSCI
|
|
default ARMV7_PSCI_0_1 if ARCH_SUNXI
|
|
default ARMV7_PSCI_1_0
|
|
help
|
|
Select the supported PSCI version.
|
|
|
|
config ARMV7_PSCI_1_0
|
|
bool "PSCI V1.0"
|
|
|
|
config ARMV7_PSCI_0_2
|
|
bool "PSCI V0.2"
|
|
|
|
config ARMV7_PSCI_0_1
|
|
bool "PSCI V0.1"
|
|
endchoice
|
|
|
|
config ARMV7_PSCI_NR_CPUS
|
|
int "Maximum supported CPUs for PSCI"
|
|
depends on ARMV7_NONSEC
|
|
default 4
|
|
help
|
|
The maximum number of CPUs supported in the PSCI firmware.
|
|
It is no problem to set a larger value than the number of
|
|
CPUs in the actual hardware implementation.
|
|
|
|
config ARMV7_LPAE
|
|
bool "Use LPAE page table format" if EXPERT
|
|
depends on CPU_V7A
|
|
default y if ARMV7_VIRT
|
|
---help---
|
|
Say Y here to use the long descriptor page table format. This is
|
|
required if U-Boot runs in HYP mode.
|
|
|
|
config SPL_ARMV7_SET_CORTEX_SMPEN
|
|
bool
|
|
help
|
|
Enable the ARM Cortex ACTLR.SMP enable bit on SPL startup.
|
|
|
|
endif
|