mirror of
https://github.com/AsahiLinux/u-boot
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89cb2b5f8b
Update the config.h and defconfig files for the commands that 8e3c036 converted over to Kconfig Signed-off-by: Tom Rini <trini@konsulko.com>
331 lines
9.7 KiB
C
331 lines
9.7 KiB
C
/*
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* (C) Copyright 2009
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* Marvell Semiconductor <www.marvell.com>
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* Prafulla Wadaskar <prafulla@marvell.com>
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*
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* (C) Copyright 2009
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* Stefan Roese, DENX Software Engineering, sr@denx.de.
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*
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* (C) Copyright 2010-2011
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* Heiko Schocher, DENX Software Engineering, hs@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/*
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* for linking errors see
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* http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
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*/
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#ifndef _CONFIG_KM_ARM_H
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#define _CONFIG_KM_ARM_H
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/* We got removed from Linux mach-types.h */
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#define MACH_TYPE_KM_KIRKWOOD 2255
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/*
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* High Level Configuration Options (easy to change)
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*/
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#define CONFIG_MARVELL
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#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */
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#define CONFIG_KW88F6281 /* SOC Name */
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#define CONFIG_MACH_KM_KIRKWOOD /* Machine type */
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#define CONFIG_MACH_TYPE MACH_TYPE_KM_KIRKWOOD
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#define CONFIG_NAND_ECC_BCH
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#define CONFIG_BCH
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/* include common defines/options for all Keymile boards */
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#include "keymile-common.h"
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#define CONFIG_CMD_NAND
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/* SPI NOR Flash default params, used by sf commands */
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#define CONFIG_SF_DEFAULT_SPEED 8100000
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#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
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#if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
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#define CONFIG_ENV_SPI_BUS 0
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#define CONFIG_ENV_SPI_CS 0
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#define CONFIG_ENV_SPI_MAX_HZ 8100000
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#define CONFIG_ENV_SPI_MODE SPI_MODE_3
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#endif
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/* Reserve 4 MB for malloc */
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#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
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#include "asm/arch/config.h"
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#define CONFIG_SYS_TEXT_BASE 0x07d00000 /* code address before reloc */
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#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */
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#define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */
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#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
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/* pseudo-non volatile RAM [hex] */
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#define CONFIG_KM_PNVRAM 0x80000
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/* physical RAM MTD size [hex] */
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#define CONFIG_KM_PHRAM 0x17F000
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#define CONFIG_KM_CRAMFS_ADDR 0x2400000
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#define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 3098KBytes */
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#define CONFIG_KM_FDT_ADDR 0x23E0000 /* 128KBytes */
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/* architecture specific default bootargs */
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#define CONFIG_KM_DEF_BOOT_ARGS_CPU \
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"bootcountaddr=${bootcountaddr} ${mtdparts}" \
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" boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}"
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#define CONFIG_KM_DEF_ENV_CPU \
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"u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.kwb\0" \
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CONFIG_KM_UPDATE_UBOOT \
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"set_fdthigh=setenv fdt_high ${kernelmem}\0" \
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"checkfdt=" \
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"if cramfsls fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb; " \
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"then true; else setenv cramfsloadfdt true; " \
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"setenv boot bootm ${load_addr_r}; " \
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"echo No FDT found, booting with the kernel " \
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"appended one; fi\0" \
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""
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#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
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#define CONFIG_MISC_INIT_R
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/*
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* NS16550 Configuration
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*/
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
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#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE
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#define CONFIG_SYS_NS16550_COM2 KW_UART1_BASE
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/*
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* Serial Port configuration
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* The following definitions let you select what serial you want to use
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* for your console driver.
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*/
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#define CONFIG_CONS_INDEX 1 /* Console on UART0 */
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/*
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* For booting Linux, the board info and command line data
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* have to be in the first 8 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization.
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*/
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#define CONFIG_BOOTMAPSZ (8 << 20) /* Initial Memmap for Linux */
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_INITRD_TAG /* enable INITRD tag */
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#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
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/*
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* Commands configuration
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*/
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#define CONFIG_CMD_MTDPARTS
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/*
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* Without NOR FLASH we need this
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*/
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#define CONFIG_SYS_NO_FLASH
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/*
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* NAND Flash configuration
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*/
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define BOOTFLASH_START 0x0
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/* Kirkwood has two serial IF */
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#if (CONFIG_CONS_INDEX == 2)
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#define CONFIG_KM_CONSOLE_TTY "ttyS1"
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#else
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#define CONFIG_KM_CONSOLE_TTY "ttyS0"
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#endif
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/*
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* Other required minimal configurations
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*/
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#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */
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#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
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#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */
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#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
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#define CONFIG_NR_DRAM_BANKS 4
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#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
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/*
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* Ethernet Driver configuration
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*/
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#define CONFIG_NETCONSOLE /* include NetConsole support */
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#define CONFIG_MII /* expose smi ove miiphy interface */
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#define CONFIG_MVGBE /* Enable Marvell Gbe Controller Driver */
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#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */
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#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
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#define CONFIG_PHY_BASE_ADR 0
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#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
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#define CONFIG_KM_COMMON_ETH_INIT /* standard km ethernet_present for piggy */
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/*
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* UBI related stuff
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*/
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#define CONFIG_SYS_USE_UBI
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/*
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* I2C related stuff
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*/
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#undef CONFIG_I2C_MVTWSI
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
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#define CONFIG_SYS_I2C_INIT_BOARD
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#define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */
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#define CONFIG_SYS_NUM_I2C_BUSES 6
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#define CONFIG_SYS_I2C_MAX_HOPS 1
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#define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \
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{0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
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{0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
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{0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
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{0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
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{0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
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}
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#ifndef __ASSEMBLY__
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#include <asm/arch/gpio.h>
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extern void __set_direction(unsigned pin, int high);
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void set_sda(int state);
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void set_scl(int state);
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int get_sda(void);
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int get_scl(void);
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#define KM_KIRKWOOD_SDA_PIN 8
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#define KM_KIRKWOOD_SCL_PIN 9
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#define KM_KIRKWOOD_SOFT_I2C_GPIOS 0x0300
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#define KM_KIRKWOOD_ENV_WP 38
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#define I2C_ACTIVE __set_direction(KM_KIRKWOOD_SDA_PIN, 0)
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#define I2C_TRISTATE __set_direction(KM_KIRKWOOD_SDA_PIN, 1)
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#define I2C_READ (kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0)
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#define I2C_SDA(bit) kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit)
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#define I2C_SCL(bit) kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit)
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#endif
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#define I2C_DELAY udelay(1)
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#define I2C_SOFT_DECLARATIONS
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#define CONFIG_SYS_I2C_SOFT_SLAVE 0x0
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#define CONFIG_SYS_I2C_SOFT_SPEED 100000
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/* EEprom support 24C128, 24C256 valid for environment eeprom */
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 Byte write page */
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
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/*
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* Environment variables configurations
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*/
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#if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
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#define CONFIG_ENV_IS_IN_SPI_FLASH /* use SPI-Flash for environment vars */
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#define CONFIG_ENV_OFFSET 0xc0000 /* no bracets! */
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#define CONFIG_ENV_SIZE 0x02000 /* Size of Environment */
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#define CONFIG_ENV_SECT_SIZE 0x10000
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#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
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CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_TOTAL_SIZE 0x20000 /* no bracets! */
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#else
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#define CONFIG_ENV_IS_IN_EEPROM /* use EEPROM for environment vars */
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#define CONFIG_SYS_DEF_EEPROM_ADDR 0x50
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#define CONFIG_ENV_EEPROM_IS_ON_I2C
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#define CONFIG_SYS_EEPROM_WREN
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#define CONFIG_ENV_OFFSET 0x0 /* no bracets! */
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#define CONFIG_ENV_SIZE (0x2000 - CONFIG_ENV_OFFSET)
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#define CONFIG_I2C_ENV_EEPROM_BUS 5 /* I2C2 (Mux-Port 5) */
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#define CONFIG_ENV_OFFSET_REDUND 0x2000 /* no bracets! */
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#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
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#endif
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#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
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/* SPI bus claim MPP configuration */
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#define CONFIG_SYS_KW_SPI_MPP 0x0
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#define FLASH_GPIO_PIN 0x00010000
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#define KM_FLASH_GPIO_PIN 16
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#ifndef MTDIDS_DEFAULT
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# define MTDIDS_DEFAULT "nand0=orion_nand"
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#endif /* MTDIDS_DEFAULT */
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#ifndef MTDPARTS_DEFAULT
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# define MTDPARTS_DEFAULT "mtdparts=" \
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"orion_nand:" \
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"-(" CONFIG_KM_UBI_PARTITION_NAME_BOOT ");"
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#endif /* MTDPARTS_DEFAULT */
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#define CONFIG_KM_UPDATE_UBOOT \
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"update=" \
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"sf probe 0;sf erase 0 +${filesize};" \
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"sf write ${load_addr_r} 0 ${filesize};\0"
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#if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
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#define CONFIG_KM_NEW_ENV \
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"newenv=sf probe 0;" \
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"sf erase " __stringify(CONFIG_ENV_OFFSET) " " \
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__stringify(CONFIG_ENV_TOTAL_SIZE)"\0"
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#else
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#define CONFIG_KM_NEW_ENV \
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"newenv=setenv addr 0x100000 && " \
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"i2c dev " __stringify(CONFIG_I2C_ENV_EEPROM_BUS) "; " \
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"mw.b ${addr} 0 4 && " \
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"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \
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" ${addr} " __stringify(CONFIG_ENV_OFFSET) " 4 && " \
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"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \
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" ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0"
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#endif
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#ifndef CONFIG_KM_BOARD_EXTRA_ENV
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#define CONFIG_KM_BOARD_EXTRA_ENV ""
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#endif
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/*
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* Default environment variables
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*/
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#define CONFIG_EXTRA_ENV_SETTINGS \
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CONFIG_KM_BOARD_EXTRA_ENV \
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CONFIG_KM_DEF_ENV \
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CONFIG_KM_NEW_ENV \
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"arch=arm\0" \
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""
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#if defined(CONFIG_SYS_NO_FLASH)
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#undef CONFIG_FLASH_CFI_MTD
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#undef CONFIG_JFFS2_CMDLINE
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#endif
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/* additions for new relocation code, must be added to all boards */
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#define CONFIG_SYS_SDRAM_BASE 0x00000000
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/* Do early setups now in board_init_f() */
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#define CONFIG_BOARD_EARLY_INIT_F
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/*
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* resereved pram area at the end of memroy [hex]
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* 8Mbytes for switch + 4Kbytes for bootcount
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*/
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#define CONFIG_KM_RESERVED_PRAM 0x801000
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/* address for the bootcount (taken from end of RAM) */
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#define BOOTCOUNT_ADDR (CONFIG_KM_RESERVED_PRAM)
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/* Use generic bootcount RAM driver */
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#define CONFIG_BOOTCOUNT_RAM
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/* enable POST tests */
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#define CONFIG_POST (CONFIG_SYS_POST_MEM_REGIONS)
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#define CONFIG_POST_SKIP_ENV_FLAGS
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#define CONFIG_POST_EXTERNAL_WORD_FUNCS
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#define CONFIG_CMD_DIAG
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/* we do the whole PCIe FPGA config stuff here */
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#define CONFIG_BOARD_LATE_INIT
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#endif /* _CONFIG_KM_ARM_H */
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