mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-30 00:21:06 +00:00
57c4c5d336
The ROCK64 is a credit card size SBC based on Rockchip RK3328
Quad-Core ARM Cortex A53.
This series allow building u-boot SPL and u-boot.itb for Rock64
board. The proprietary TPL is stil required for deploy:
./tools/mkimage -n rk3328 -T rksd \
-d ./rkbin/bin/rk33/rk3328_ddr_333MHz_v1.16.bin idbloader.img
cat ./spl/u-boot-spl.bin >> idbloader.img
dd if=idbloader.img of=/dev/sdcard seek=64 conv=notrunc
dd if=u-boot.itb of=/dev/sdcard seek=16384 conv=notrunc
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
91 lines
2.4 KiB
Text
91 lines
2.4 KiB
Text
CONFIG_SMBIOS_MANUFACTURER="pine64"
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CONFIG_SMBIOS_PRODUCT_NAME="rock64_rk3328"
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CONFIG_ARM=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_SYS_TEXT_BASE=0x00200000
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CONFIG_ROCKCHIP_RK3328=y
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CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x40000
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CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
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CONFIG_SPL_STACK_R_ADDR=0x600000
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CONFIG_DEBUG_UART_BASE=0xFF130000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART=y
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CONFIG_NR_DRAM_BANKS=1
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# CONFIG_ANDROID_BOOT_IMAGE is not set
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_SPL_LOAD_FIT=y
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CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
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CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock64.dtb"
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_SPL_STACK_R=y
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CONFIG_SPL_ATF=y
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CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
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CONFIG_FASTBOOT_BUF_ADDR=0x800800
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CONFIG_FASTBOOT_FLASH=y
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CONFIG_FASTBOOT_FLASH_MMC_DEV=1
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CONFIG_CMD_BOOTZ=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_TIME=y
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CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock64"
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_REGMAP=y
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CONFIG_SPL_REGMAP=y
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CONFIG_SYSCON=y
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CONFIG_SPL_SYSCON=y
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CONFIG_CLK=y
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CONFIG_SPL_CLK=y
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CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_SYS_I2C_ROCKCHIP=y
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CONFIG_MMC_DW=y
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CONFIG_MMC_DW_ROCKCHIP=y
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CONFIG_SPI_FLASH=y
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CONFIG_SF_DEFAULT_SPEED=20000000
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CONFIG_DM_ETH=y
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CONFIG_ETH_DESIGNWARE=y
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CONFIG_GMAC_ROCKCHIP=y
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CONFIG_PHY=y
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CONFIG_PINCTRL=y
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CONFIG_SPL_PINCTRL=y
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CONFIG_PINCTRL_ROCKCHIP_RK3328=y
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CONFIG_DM_PMIC=y
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CONFIG_PMIC_RK8XX=y
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CONFIG_REGULATOR_PWM=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_REGULATOR_RK8XX=y
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CONFIG_PWM_ROCKCHIP=y
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CONFIG_RAM=y
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CONFIG_SPL_RAM=y
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CONFIG_DM_RESET=y
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CONFIG_BAUDRATE=1500000
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_SYSRESET=y
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CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_DWC3=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_EHCI_GENERIC=y
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CONFIG_USB_OHCI_HCD=y
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CONFIG_USB_OHCI_GENERIC=y
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CONFIG_USB_DWC2=y
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CONFIG_USB_DWC3=y
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CONFIG_USB_GADGET=y
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CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
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CONFIG_USB_GADGET_VENDOR_NUM=0x2207
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CONFIG_USB_GADGET_PRODUCT_NUM=0x330a
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CONFIG_USB_GADGET_DWC2_OTG=y
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CONFIG_USE_TINY_PRINTF=y
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CONFIG_SPL_TINY_MEMSET=y
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CONFIG_ERRNO_STR=y
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