mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-14 23:33:00 +00:00
34fc2a6edf
The Arria10 uses slightly different boot image header than the Gen5 SoCs, in particular the header itself contains an offset from the start of the header to which the Arria10 jumps. This offset must not be negative, yet the header is placed at offset 0x40 of the bootable binary. Therefore, to jump into U-Boot, add a trampoline just past the Arria10 boot header and point to this trampoline at fixed offset from the header generated using the mkimage -T socfpgaimage_v1 . Note that it is not needed to jump back to offset 0x0 of the image, it is possible to jump directly at the reset label and save processing two instructions. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Chin Liang See <chin.liang.see@intel.com>
26 lines
501 B
C
26 lines
501 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
/*
|
|
* Specialty padding for the Altera SoCFPGA preloader image
|
|
*/
|
|
|
|
#ifndef __BOOT0_H
|
|
#define __BOOT0_H
|
|
|
|
_start:
|
|
ARM_VECTORS
|
|
|
|
#ifdef CONFIG_SPL_BUILD
|
|
.balignl 64,0xf33db33f;
|
|
|
|
.word 0x1337c0d3; /* SoCFPGA preloader validation word */
|
|
.word 0xc01df00d; /* Version, flags, length */
|
|
.word 0xcafec0d3; /* Checksum, zero-pad */
|
|
nop;
|
|
|
|
b reset; /* SoCFPGA Gen5 jumps here */
|
|
b reset; /* SoCFPGA Gen10 trampoline */
|
|
nop;
|
|
nop;
|
|
#endif
|
|
|
|
#endif /* __BOOT0_H */
|