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83f71ef558
Commitff7bd212cb("net: phy: micrel: fix divisor value for KSZ9031 phy skew") fixed the skew value divisor for the KSZ9031, but left the code using the same divisor for the KSZ9021, which is incorrect. The preceding commitc16e69f702("net: phy: micrel: add documentation for Micrel KSZ90x1 binding") added the DTS documentation for the KSZ90x1, changing it from the equivalent file in the Linux kernel to correctly state that for this part the skew value is set in 120ps steps, whereas the Linux documentation and driver continue to this day to use the incorrect value of 200 that came from the original KSZ9021 datasheet before it was corrected in revision 1.2 (Feb 2014). This commit sorts out the resulting confusion in a consistent way by making the following changes: - Update the documentation to be clear about what the skew values mean, in the same was as for the KSZ9031. - Update the Micrel PHY driver to select the appropriate divisor for both parts. - Adjust all the device trees that state skew values for KSZ9021 PHYs to use values based on 120ps steps instead of 200ps steps. This will result in the same values being programmed into the skew registers as the equivalent device trees in the Linux kernel do, where it incorrectly uses 200ps steps (since that's where all these device trees were copied from). Signed-off-by: James Byrne <james.byrne@origamienergy.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
166 lines
2.7 KiB
Text
166 lines
2.7 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2012 Altera Corporation <www.altera.com>
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*/
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#include "socfpga_cyclone5.dtsi"
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/ {
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model = "Altera SOCFPGA Cyclone V SoC Development Kit";
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compatible = "altr,socfpga-cyclone5-socdk", "altr,socfpga-cyclone5", "altr,socfpga";
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chosen {
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bootargs = "earlyprintk";
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stdout-path = "serial0:115200n8";
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};
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memory@0 {
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name = "memory";
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device_type = "memory";
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reg = <0x0 0x40000000>; /* 1GB */
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};
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aliases {
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/* this allow the ethaddr uboot environmnet variable contents
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* to be added to the gmac1 device tree blob.
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*/
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ethernet0 = &gmac1;
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};
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leds {
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compatible = "gpio-leds";
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hps0 {
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label = "hps_led0";
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gpios = <&portb 15 1>;
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};
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hps1 {
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label = "hps_led1";
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gpios = <&portb 14 1>;
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};
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hps2 {
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label = "hps_led2";
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gpios = <&portb 13 1>;
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};
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hps3 {
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label = "hps_led3";
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gpios = <&portb 12 1>;
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};
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};
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regulator_3_3v: 3-3-v-regulator {
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compatible = "regulator-fixed";
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regulator-name = "3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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};
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&can0 {
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status = "okay";
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};
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&gmac1 {
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status = "okay";
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phy-mode = "rgmii";
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rxd0-skew-ps = <0>;
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rxd1-skew-ps = <0>;
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rxd2-skew-ps = <0>;
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rxd3-skew-ps = <0>;
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txen-skew-ps = <0>;
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txc-skew-ps = <1560>;
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rxdv-skew-ps = <0>;
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rxc-skew-ps = <1200>;
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};
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&gpio0 {
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status = "okay";
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};
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&gpio1 {
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status = "okay";
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};
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&gpio2 {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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clock-frequency = <100000>;
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/*
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* adjust the falling times to decrease the i2c frequency to 50Khz
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* because the LCD module does not work at the standard 100Khz
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*/
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i2c-sda-falling-time-ns = <5000>;
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i2c-scl-falling-time-ns = <5000>;
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eeprom@51 {
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compatible = "atmel,24c32";
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reg = <0x51>;
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pagesize = <32>;
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};
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rtc@68 {
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compatible = "dallas,ds1339";
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reg = <0x68>;
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};
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};
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&mmc0 {
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cd-gpios = <&portb 18 0>;
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vmmc-supply = <®ulator_3_3v>;
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vqmmc-supply = <®ulator_3_3v>;
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status = "okay";
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};
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&qspi {
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status = "okay";
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flash0: n25q00@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "n25q00";
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reg = <0>; /* chip select */
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spi-max-frequency = <100000000>;
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m25p,fast-read;
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cdns,page-size = <256>;
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cdns,block-size = <16>;
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cdns,read-delay = <4>;
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cdns,tshsl-ns = <50>;
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cdns,tsd2d-ns = <50>;
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cdns,tchsh-ns = <4>;
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cdns,tslch-ns = <4>;
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partition@qspi-boot {
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/* 8MB for raw data. */
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label = "Flash 0 Raw Data";
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reg = <0x0 0x800000>;
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};
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partition@qspi-rootfs {
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/* 120MB for jffs2 data. */
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label = "Flash 0 jffs2 Filesystem";
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reg = <0x800000 0x7800000>;
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};
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};
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};
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&spi0 {
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status = "okay";
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spidev@0 {
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compatible = "rohm,dh2228fv";
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reg = <0>;
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spi-max-frequency = <1000000>;
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};
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};
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&usb1 {
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status = "okay";
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};
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