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ae9996c806
The SR1500 board is a CycloneV based board, similar to the EBV SoCrates, equipped with the following devices: - SPI NOR - eMMC - Ethernet Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de>
72 lines
2 KiB
Text
72 lines
2 KiB
Text
if ARCH_SOCFPGA
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config TARGET_SOCFPGA_ARRIA5
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bool
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config TARGET_SOCFPGA_CYCLONE5
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bool
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choice
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prompt "Altera SOCFPGA board select"
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optional
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config TARGET_SOCFPGA_ARRIA5_SOCDK
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bool "Altera SOCFPGA SoCDK (Arria V)"
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select TARGET_SOCFPGA_ARRIA5
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config TARGET_SOCFPGA_CYCLONE5_SOCDK
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bool "Altera SOCFPGA SoCDK (Cyclone V)"
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select TARGET_SOCFPGA_CYCLONE5
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config TARGET_SOCFPGA_DENX_MCVEVK
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bool "DENX MCVEVK (Cyclone V)"
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select TARGET_SOCFPGA_CYCLONE5
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config TARGET_SOCFPGA_SR1500
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bool "SR1500 (Cyclone V)"
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select TARGET_SOCFPGA_CYCLONE5
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config TARGET_SOCFPGA_EBV_SOCRATES
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bool "EBV SoCrates (Cyclone V)"
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select TARGET_SOCFPGA_CYCLONE5
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config TARGET_SOCFPGA_TERASIC_DE0_NANO
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bool "Terasic DE0-Nano-Atlas (Cyclone V)"
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select TARGET_SOCFPGA_CYCLONE5
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config TARGET_SOCFPGA_TERASIC_SOCKIT
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bool "Terasic SoCkit (Cyclone V)"
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select TARGET_SOCFPGA_CYCLONE5
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endchoice
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config SYS_BOARD
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default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
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default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
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default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
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default "mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
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default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
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default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES
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default "sr1500" if TARGET_SOCFPGA_SR1500
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config SYS_VENDOR
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default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
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default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK
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default "denx" if TARGET_SOCFPGA_DENX_MCVEVK
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default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES
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default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO
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default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT
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config SYS_SOC
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default "socfpga"
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config SYS_CONFIG_NAME
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default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
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default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
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default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
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default "socfpga_mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
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default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
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default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES
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default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500
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endif
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