mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-02 01:19:49 +00:00
b0e6c73a79
Add a node for the watchdog timer based on the proposed Linux device tree bindings. Remove the old reboot node which was a watchdog timert node in disguise using a preliminary device tree binding. Signed-off-by: Sven Peter <sven@svenpeter.dev> Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de> Tested-on: Apple M1 Macbook Tested-by: Simon Glass <sjg@chromium.org>
563 lines
15 KiB
Text
563 lines
15 KiB
Text
// SPDX-License-Identifier: GPL-2.0+ OR MIT
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/*
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* Apple T8103 "M1" SoC
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*
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* Other names: H13G, "Tonga"
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*
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* Copyright The Asahi Linux Contributors
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/apple-aic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/pinctrl/apple.h>
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#include <dt-bindings/spmi/spmi.h>
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/ {
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compatible = "apple,t8103", "apple,arm-platform";
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#address-cells = <2>;
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#size-cells = <2>;
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cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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compatible = "apple,icestorm";
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device_type = "cpu";
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reg = <0x0 0x0>;
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enable-method = "spin-table";
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cpu-release-addr = <0 0>; /* To be filled by loader */
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};
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cpu1: cpu@1 {
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compatible = "apple,icestorm";
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device_type = "cpu";
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reg = <0x0 0x1>;
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enable-method = "spin-table";
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cpu-release-addr = <0 0>; /* To be filled by loader */
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};
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cpu2: cpu@2 {
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compatible = "apple,icestorm";
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device_type = "cpu";
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reg = <0x0 0x2>;
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enable-method = "spin-table";
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cpu-release-addr = <0 0>; /* To be filled by loader */
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};
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cpu3: cpu@3 {
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compatible = "apple,icestorm";
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device_type = "cpu";
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reg = <0x0 0x3>;
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enable-method = "spin-table";
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cpu-release-addr = <0 0>; /* To be filled by loader */
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};
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cpu4: cpu@10100 {
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compatible = "apple,firestorm";
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device_type = "cpu";
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reg = <0x0 0x10100>;
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enable-method = "spin-table";
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cpu-release-addr = <0 0>; /* To be filled by loader */
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};
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cpu5: cpu@10101 {
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compatible = "apple,firestorm";
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device_type = "cpu";
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reg = <0x0 0x10101>;
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enable-method = "spin-table";
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cpu-release-addr = <0 0>; /* To be filled by loader */
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};
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cpu6: cpu@10102 {
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compatible = "apple,firestorm";
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device_type = "cpu";
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reg = <0x0 0x10102>;
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enable-method = "spin-table";
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cpu-release-addr = <0 0>; /* To be filled by loader */
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};
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cpu7: cpu@10103 {
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compatible = "apple,firestorm";
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device_type = "cpu";
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reg = <0x0 0x10103>;
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enable-method = "spin-table";
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cpu-release-addr = <0 0>; /* To be filled by loader */
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};
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupt-parent = <&aic>;
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interrupt-names = "hyp-phys", "hyp-virt", "phys", "virt";
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interrupts = <AIC_FIQ AIC_TMR_HV_PHYS IRQ_TYPE_LEVEL_HIGH>,
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<AIC_FIQ AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH>,
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<AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
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<AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>;
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};
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clkref: clock-ref {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24000000>;
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clock-output-names = "clkref";
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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dma-ranges;
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dma-coherent;
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nonposted-mmio;
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serial0: serial@235200000 {
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compatible = "apple,s5l-uart";
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reg = <0x2 0x35200000 0x0 0x1000>;
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reg-io-width = <4>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 605 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clkref>, <&clkref>, <&clkref>;
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clock-names = "uart", "clk_uart_baud0", "clk_uart_baud1";
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power-domains = <&ps_uart0>;
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status = "disabled";
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};
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serial2: serial@235208000 {
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compatible = "apple,s5l-uart";
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reg = <0x2 0x35208000 0x0 0x1000>;
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reg-io-width = <4>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 607 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clkref>, <&clkref>, <&clkref>;
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clock-names = "uart", "clk_uart_baud0", "clk_uart_baud1";
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power-domains = <&ps_uart2>;
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status = "disabled";
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};
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aic: interrupt-controller@23b100000 {
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compatible = "apple,t8103-aic", "apple,aic";
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#interrupt-cells = <3>;
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interrupt-controller;
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reg = <0x2 0x3b100000 0x0 0x8000>;
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};
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pmgr: power-controller@23b700000 {
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compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x2 0x3b700000 0x0 0x14000>;
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ps_pcie_ref: power-controller@1a0 {
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compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x1a0>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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apple,domain-name = "pcie_ref";
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};
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ps_imx: power-controller@1b8 {
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compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x1b8>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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apple,domain-name = "imx";
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apple,always-on;
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};
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ps_sio: power-controller@1c0 {
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compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x1c0>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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apple,domain-name = "sio";
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};
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ps_uart_p: power-controller@220 {
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compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x220>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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power-domains = <&ps_sio>;
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apple,domain-name = "uart_p";
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};
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ps_uart0: power-controller@270 {
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compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x270>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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power-domains = <&ps_uart_p>;
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apple,domain-name = "uart0";
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};
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ps_uart1: power-controller@278 {
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compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x278>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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apple,domain-name = "uart1";
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power-domains = <&ps_uart_p>;
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};
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ps_uart2: power-controller@280 {
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compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x280>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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apple,domain-name = "uart2";
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power-domains = <&ps_uart_p>;
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};
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ps_uart3: power-controller@288 {
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compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x288>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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apple,domain-name = "uart3";
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power-domains = <&ps_uart_p>;
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};
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ps_apcie: power-controller@348 {
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compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x348>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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apple,domain-name = "apcie";
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power-domains = <&ps_imx>;
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};
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ps_apcie_gp: power-controller@3e8 {
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compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x3e8>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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apple,domain-name = "apcie_gp";
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power-domains = <&ps_apcie>;
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};
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ps_ans2: power-controller@3f0 {
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compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x3f0>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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apple,domain-name = "ans2";
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power-domains = <&ps_apcie_st>;
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};
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ps_apcie_st: power-controller@418 {
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compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
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reg = <0x418>;
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#power-domain-cells = <0>;
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#reset-cells = <0>;
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apple,domain-name = "apcie_st";
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power-domains = <&ps_apcie>;
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};
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};
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pinctrl_ap: pinctrl@23c100000 {
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compatible = "apple,t8103-pinctrl", "apple,pinctrl";
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reg = <0x2 0x3c100000 0x0 0x100000>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&pinctrl_ap 0 0 212>;
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interrupt-controller;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 190 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 191 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 192 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 193 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 194 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 195 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 196 IRQ_TYPE_LEVEL_HIGH>;
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i2c0_pins: i2c0_pins {
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pinmux = <APPLE_PINMUX(188, 1)>,
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<APPLE_PINMUX(192, 1)>;
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};
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pcie_pins: pcie-pins {
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pinmux = <APPLE_PINMUX(150, 1)>,
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<APPLE_PINMUX(151, 1)>,
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<APPLE_PINMUX(32, 1)>;
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};
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};
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pinctrl_aop: pinctrl@24a820000 {
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compatible = "apple,t8103-pinctrl", "apple,pinctrl";
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reg = <0x2 0x4a820000 0x0 0x4000>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&pinctrl_aop 0 0 42>;
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interrupt-controller;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 268 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 269 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 270 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 271 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 272 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 273 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 274 IRQ_TYPE_LEVEL_HIGH>;
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};
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pinctrl_nub: pinctrl@23d1f0000 {
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compatible = "apple,t8103-pinctrl", "apple,pinctrl";
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reg = <0x2 0x3d1f0000 0x0 0x4000>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&pinctrl_nub 0 0 23>;
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interrupt-controller;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 330 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 331 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 332 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 333 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 334 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 335 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 336 IRQ_TYPE_LEVEL_HIGH>;
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};
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wdt: watchdog@23d2b0000 {
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compatible = "apple,t8103-wdt", "apple,wdt";
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reg = <0x2 0x3d2b0000 0x0 0x4000>;
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clocks = <&clkref>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 338 IRQ_TYPE_LEVEL_HIGH>;
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};
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pinctrl_smc: pinctrl@23e820000 {
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compatible = "apple,t8103-pinctrl", "apple,pinctrl";
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reg = <0x2 0x3e820000 0x0 0x4000>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&pinctrl_smc 0 0 16>;
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interrupt-controller;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 391 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 392 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 393 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 394 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 395 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 396 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 397 IRQ_TYPE_LEVEL_HIGH>;
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};
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i2c0: i2c@20a110000 {
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compatible = "apple,i2c-v0";
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reg = <0x2 0x35010000 0x0 0x4000>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 627 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clkref>;
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pinctrl-0 = <&i2c0_pins>;
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pinctrl-names = "default";
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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hpm0: hpm@38 {
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compatible = "ti,tps6598x";
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reg = <0x38>;
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};
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hpm1: hpm@3f {
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compatible = "ti,tps6598x";
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reg = <0x3f>;
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};
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};
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ans_mbox: mbox@277400000 {
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compatible = "apple,iop-mailbox-m1";
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reg = <0x2 0x77400000 0x0 0x20000>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 583 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 586 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&ps_ans2>;
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#mbox-cells = <1>;
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endpoints = <32>;
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};
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ans@27bcc0000 {
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compatible = "apple,nvme-m1";
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reg = <0x2 0x7bcc0000 0x0 0x40000>,
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<0x2 0x7bc50000 0x0 0x4000>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 590 IRQ_TYPE_LEVEL_HIGH>;
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power-domains = <&ps_apcie_st>;
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mboxes = <&ans_mbox 32>;
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};
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pcie0_dart_0: iommu@681008000 {
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compatible = "apple,t8103-dart", "apple,dart-m1";
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reg = <0x6 0x81008000 0x0 0x4000>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 696 IRQ_TYPE_LEVEL_HIGH>;
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#iommu-cells = <1>;
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status = "disabled";
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};
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pcie0_dart_1: iommu@682008000 {
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compatible = "apple,t8103-dart", "apple,dart-m1";
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reg = <0x6 0x82008000 0x0 0x4000>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 699 IRQ_TYPE_LEVEL_HIGH>;
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#iommu-cells = <1>;
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status = "disabled";
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};
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pcie0_dart_2: iommu@683008000 {
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compatible = "apple,t8103-dart", "apple,dart-m1";
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reg = <0x6 0x83008000 0x0 0x4000>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 702 IRQ_TYPE_LEVEL_HIGH>;
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#iommu-cells = <1>;
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status = "disabled";
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};
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smc_mbox: mbox@23e400000 {
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compatible = "apple,iop-mailbox-m1";
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reg = <0x2 0x3e400000 0x0 0x20000>;
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#mbox-cells = <1>;
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endpoints = <32>;
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};
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smc: smc@23e050000 {
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compatible = "apple,smc-m1";
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reg = <0x2 0x3e050000 0x0 0x4000>;
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mboxes = <&smc_mbox 32>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-13 = <0x00800000>;
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};
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pcie0: pcie@690000000 {
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compatible = "apple,t8103-pcie", "apple,pcie";
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reg = <0x6 0x90000000 0x0 0x1000000>,
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<0x6 0x80000000 0x0 0x4000>,
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<0x6 0x81000000 0x0 0x8000>,
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<0x6 0x82000000 0x0 0x8000>,
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<0x6 0x83000000 0x0 0x8000>;
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reg-names = "config", "rc", "port0", "port1", "port2";
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 695 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 698 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 701 IRQ_TYPE_LEVEL_HIGH>;
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msi-controller;
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msi-parent = <&pcie0>;
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msi-ranges = <&aic AIC_IRQ 704 IRQ_TYPE_EDGE_RISING 32>;
|
|
|
|
iommu-map = <0x100 &pcie0_dart_0 1 1>,
|
|
<0x200 &pcie0_dart_1 1 1>,
|
|
<0x300 &pcie0_dart_2 1 1>;
|
|
iommu-map-mask = <0xff00>;
|
|
|
|
bus-range = <0 3>;
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
ranges = <0x43000000 0x6 0xa0000000 0x6 0xa0000000
|
|
0x0 0x20000000>,
|
|
<0x02000000 0x0 0xc0000000 0x6 0xc0000000
|
|
0x0 0x40000000>;
|
|
|
|
power-domains = <&ps_apcie>, <&ps_apcie_gp>, <&ps_pcie_ref>;
|
|
pinctrl-0 = <&pcie_pins>;
|
|
pinctrl-names = "default";
|
|
|
|
device_type = "pci";
|
|
status = "disabled";
|
|
};
|
|
|
|
dwc3_0_dart_0: iommu@382f00000 {
|
|
compatible = "apple,t8103-dart";
|
|
reg = <0x3 0x82f00000 0x0 0x4000>;
|
|
interrupt-parent = <&aic>;
|
|
interrupts = <AIC_IRQ 781 IRQ_TYPE_LEVEL_HIGH>;
|
|
#iommu-cells = <1>;
|
|
status = "disabled";
|
|
};
|
|
|
|
dwc3_0_dart_1: iommu@382f80000 {
|
|
compatible = "apple,t8103-dart";
|
|
reg = <0x3 0x82f80000 0x0 0x4000>;
|
|
interrupt-parent = <&aic>;
|
|
interrupts = <AIC_IRQ 781 IRQ_TYPE_LEVEL_HIGH>;
|
|
#iommu-cells = <1>;
|
|
status = "disabled";
|
|
};
|
|
|
|
dwc3_0: usb@382280000{
|
|
compatible = "snps,dwc3";
|
|
reg = <0x3 0x82280000 0x0 0x100000>;
|
|
interrupt-parent = <&aic>;
|
|
interrupts = <AIC_IRQ 777 IRQ_TYPE_LEVEL_HIGH>;
|
|
dr_mode = "host";
|
|
iommus = <&dwc3_0_dart_0 0>, <&dwc3_0_dart_1 1>;
|
|
status = "disabled";
|
|
};
|
|
|
|
dwc3_1_dart_0: iommu@502f00000 {
|
|
compatible = "apple,t8103-dart";
|
|
reg = <0x5 0x02f00000 0x0 0x4000>;
|
|
interrupt-parent = <&aic>;
|
|
interrupts = <AIC_IRQ 861 IRQ_TYPE_LEVEL_HIGH>;
|
|
#iommu-cells = <1>;
|
|
status = "disabled";
|
|
};
|
|
|
|
dwc3_1_dart_1: iommu@502f80000 {
|
|
compatible = "apple,t8103-dart";
|
|
reg = <0x5 0x02f80000 0x0 0x4000>;
|
|
interrupt-parent = <&aic>;
|
|
interrupts = <AIC_IRQ 861 IRQ_TYPE_LEVEL_HIGH>;
|
|
#iommu-cells = <1>;
|
|
status = "disabled";
|
|
};
|
|
|
|
dwc3_1: usb@502280000{
|
|
compatible = "snps,dwc3";
|
|
reg = <0x5 0x02280000 0x0 0x100000>;
|
|
interrupt-parent = <&aic>;
|
|
interrupts = <AIC_IRQ 857 IRQ_TYPE_LEVEL_HIGH>;
|
|
dr_mode = "host";
|
|
iommus = <&dwc3_1_dart_0 0>, <&dwc3_1_dart_1 1>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi@23510c000 {
|
|
compatible = "apple,t8103-spi", "apple,spi";
|
|
reg = <0x2 0x3510c000 0x0 0x4000>;
|
|
interrupt-parent = <&aic>;
|
|
interrupts = <AIC_IRQ 617 IRQ_TYPE_LEVEL_HIGH>;
|
|
cs-gpios = <&pinctrl_ap 49 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
spmi@23d0d8000 {
|
|
compatible = "apple,t8103-spmi", "apple,spmi";
|
|
reg = <0x2 0x3d0d9300 0x0 0x100>;
|
|
interrupt-parent = <&aic>;
|
|
interrupts = <AIC_IRQ 343 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
|
#address-cells = <2>;
|
|
#size-cells = <0>;
|
|
|
|
pmu@f {
|
|
compatible = "apple,sera-pmu";
|
|
reg = <0xf SPMI_USID>;
|
|
};
|
|
};
|
|
};
|
|
};
|