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0e897621b4
Deduplicate similar DDRC configurations and LPDDR4 training patterns by patching a single configuration. The aim is to reduce the SPL memory footprint and simplify maintenance of lpddr4_timing.c Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
11 lines
219 B
C
11 lines
219 B
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright 2022 Toradex
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*/
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#ifndef __LPDDR4_TIMING_H__
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#define __LPDDR4_TIMING_H__
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void lpddr4_single_rank_training_patch(void);
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#endif /* __LPDDR4_TIMING_H__ */
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