mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-16 09:48:16 +00:00
c837dcb1a3
before we can access it; add delay in case we are faster (with no CF card inserted) * Cleanup of some init functions * Make sure SCC Ethernet is always stopped by the time we boot Linux to avoid Linux crashes by early packets coming in. * Accelerate flash accesses on LWMON board by using buffered writes
213 lines
7.3 KiB
C
213 lines
7.3 KiB
C
/*
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* (C) Copyright 2000-2004
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* board/config.h - configuration options, board specific
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_405GP 1 /* This is a PPC405GP CPU */
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#define CONFIG_4xx 1 /* ...member of PPC4xx family */
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#define CONFIG_EXBITGEN 1 /* on a Exbit Generic board */
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#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
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#define CONFIG_SYS_CLK_FREQ 25000000 /* external frequency to pll */
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/* I2C configuration */
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#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
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#define CFG_I2C_SPEED 40000 /* I2C speed */
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#define CFG_I2C_SLAVE 0x7F /* I2C slave address */
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/* environment is in EEPROM */
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#define CFG_ENV_IS_IN_EEPROM 1
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#undef CFG_ENV_IS_IN_FLASH
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#undef CFG_ENV_IS_IN_NVRAM
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#ifdef CFG_ENV_IS_IN_EEPROM
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#define CFG_I2C_EEPROM_ADDR 0x56 /* 1010110 */
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#define CFG_I2C_EEPROM_ADDR_LEN 1 /* 8-bit internal addressing */
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#define CFG_I2C_EEPROM_ADDR_OVERFLOW 1 /* ... and 1 bit in I2C address */
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#define CFG_EEPROM_PAGE_WRITE_BITS 3 /* 4 bytes per page */
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#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 40 /* write takes up to 40 msec */
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#define CFG_ENV_OFFSET 4 /* Offset of Environment Sector */
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#define CFG_ENV_SIZE 350 /* that is 350 bytes only! */
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#endif
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#define CONFIG_BOOTDELAY 10 /* autoboot after 10 seconds */
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/* Explanation:
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autbooting is altogether disabled and cannot be
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enabled if CONFIG_BOOTDELAY is negative.
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If you want shorter bootdelay, then
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- "setenv bootdelay <delay>" to the proper value
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*/
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#define CONFIG_BOOTCOMMAND "bootm 20400000 20800000"
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#define CONFIG_BOOTARGS "root=/dev/ram " \
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"ramdisk_size=32768 " \
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"console=ttyS0,115200 " \
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"ram=128M debug"
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#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
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#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
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#define CONFIG_MII 1 /* MII PHY management */
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#define CONFIG_PHY_ADDR 0 /* PHY address */
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#define CONFIG_COMMANDS (CONFIG_CMD_DFL)
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/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
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#include <cmd_confdefs.h>
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#undef CONFIG_WATCHDOG /* watchdog disabled */
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/*
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* Miscellaneous configurable options
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*/
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#define CFG_LONGHELP /* undef to save memory */
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#define CFG_PROMPT "=> " /* Monitor Command Prompt */
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#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
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#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
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#else
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#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
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#endif
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#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
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#define CFG_MAXARGS 16 /* max number of command args */
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#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
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#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
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#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
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/* UART configuration */
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#define CFG_BASE_BAUD 691200
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/* Default baud rate */
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#define CONFIG_BAUDRATE 115200
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/* The following table includes the supported baudrates */
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#define CFG_BAUDRATE_TABLE \
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{ 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \
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57600, 115200, 230400, 460800, 921600 }
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#define CFG_CLKS_IN_HZ 1 /* everything, incl board info, in Hz */
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#define CFG_LOAD_ADDR 0x100000 /* default load address */
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#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
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#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
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/*-----------------------------------------------------------------------
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* PCI stuff
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*-----------------------------------------------------------------------
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*/
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#undef CONFIG_PCI /* no pci support */
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/*-----------------------------------------------------------------------
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* External peripheral base address
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*-----------------------------------------------------------------------
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*/
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#undef CONFIG_IDE_PCMCIA /* no pcmcia interface required */
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#undef CONFIG_IDE_LED /* no led for ide supported */
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#undef CONFIG_IDE_RESET /* no reset for ide supported */
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#define CFG_KEY_REG_BASE_ADDR 0xF0100000
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#define CFG_IR_REG_BASE_ADDR 0xF0200000
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#define CFG_FPGA_REG_BASE_ADDR 0xF0300000
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/*-----------------------------------------------------------------------
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* Start addresses for the final memory configuration
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* (Set up by the startup code)
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* Please note that CFG_SDRAM_BASE _must_ start at 0
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*/
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#define CFG_SDRAM_BASE 0x00000000
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#define CFG_FLASH0_BASE 0xFFF80000
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#define CFG_FLASH0_SIZE 0x00080000
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#define CFG_FLASH1_BASE 0x20000000
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#define CFG_FLASH1_SIZE 0x02000000
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#define CFG_FLASH_BASE CFG_FLASH0_BASE
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#define CFG_FLASH_SIZE CFG_FLASH0_SIZE
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#define CFG_MONITOR_BASE TEXT_BASE
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#define CFG_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */
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#define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
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#if CFG_MONITOR_BASE < CFG_FLASH0_BASE
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#define CFG_RAMSTART
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#endif
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/*
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* For booting Linux, the board info and command line data
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* have to be in the first 8 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization.
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*/
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#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
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/*-----------------------------------------------------------------------
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* FLASH organization
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*/
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#define CFG_MAX_FLASH_BANKS 5 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
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#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
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#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
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#ifdef CFG_ENV_IS_IN_FLASH
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#define CFG_ENV_OFFSET 0x00060000 /* Offset of Environment Sector */
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#define CFG_ENV_SIZE 0x00010000 /* Total Size of Environment Sector */
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#define CFG_ENV_SECT_SIZE 0x00010000 /* see README - env sector total size */
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#endif
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/* On Chip Memory location/size */
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#define CFG_OCM_DATA_ADDR 0xF8000000
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#define CFG_OCM_DATA_SIZE 0x1000
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/* Global info and initial stack */
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#define CFG_INIT_RAM_ADDR CFG_OCM_DATA_ADDR /* inside of on-chip SRAM */
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#define CFG_INIT_RAM_END CFG_OCM_DATA_SIZE /* End of used area in RAM */
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#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
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#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
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#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
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/* Cache configuration */
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#define CFG_DCACHE_SIZE 8192
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#define CFG_CACHELINE_SIZE 32
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/*
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* Internal Definitions
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*
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* Boot Flags
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*/
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#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
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#define BOOTFLAG_WARM 0x02 /* Software reboot */
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#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
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#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
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#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
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#endif
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#endif /* __CONFIG_H */
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