mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-14 07:13:03 +00:00
14281b082a
Drop the pinmux setup in the board in favor of setting it up in the device tree. Device tree nodes match nodes used for the Linux device tree and are set according to the downstream kernel. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
1332 lines
36 KiB
Text
1332 lines
36 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/dts-v1/;
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/* This dts file describes the HTC One X smartphone */
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/* CPU Speedo ID 4, Soc Speedo ID 1, CPU Process: 1, Core Process: 0 */
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#include <dt-bindings/input/input.h>
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#include "tegra30.dtsi"
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/ {
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model = "HTC One X";
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compatible = "htc,endeavoru", "nvidia,tegra30";
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chosen {
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stdout-path = &uarta;
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};
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aliases {
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i2c0 = &pwr_i2c;
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mmc0 = &sdmmc4; /* eMMC */
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rtc0 = &pmic;
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rtc1 = "/rtc@7000e000";
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usb0 = µ_usb;
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};
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memory {
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device_type = "memory";
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reg = <0x80000000 0x40000000>;
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};
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host1x@50000000 {
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dc@54200000 {
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clocks = <&tegra_car TEGRA30_CLK_DISP1>,
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<&tegra_car TEGRA30_CLK_PLL_D_OUT0>;
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rgb {
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status = "okay";
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nvidia,panel = <&dsia>;
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};
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};
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dsia: dsi@54300000 {
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status = "okay";
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avdd-dsi-csi-supply = <&avdd_dsi_csi>;
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panel = <&panel>;
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};
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};
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pinmux@70000868 {
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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/* PORT A */
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clk_32k_out {
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nvidia,pins = "clk_32k_out_pa0";
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nvidia,function = "blink";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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bt_uart_cts {
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nvidia,pins = "uart3_cts_n_pa1";
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nvidia,function = "uartc";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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aud_aic3008_i2s {
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nvidia,pins = "dap2_fs_pa2",
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"dap2_sclk_pa3",
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"dap2_din_pa4",
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"dap2_dout_pa5";
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nvidia,function = "i2s1";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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wifi_sdio_clock {
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nvidia,pins = "sdmmc3_clk_pa6";
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nvidia,function = "sdmmc3";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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wifi_sdio_command {
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nvidia,pins = "sdmmc3_cmd_pa7";
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nvidia,function = "sdmmc3";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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/* PORT B */
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mdm_imc_uart {
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nvidia,pins = "gmi_a17_pb0",
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"gmi_a18_pb1";
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nvidia,function = "uartd";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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aud_3v3_en {
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nvidia,pins = "lcd_pwr0_pb2",
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"lcd_pclk_pb3";
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nvidia,function = "displaya";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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wifi_sdio_data {
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nvidia,pins = "sdmmc3_dat3_pb4",
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"sdmmc3_dat2_pb5",
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"sdmmc3_dat1_pb6",
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"sdmmc3_dat0_pb7";
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nvidia,function = "sdmmc3";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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/* PORT C */
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bt_uart_rts {
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nvidia,pins = "uart3_rts_n_pc0";
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nvidia,function = "uartc";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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mdm_ap2bb_rst_pwrdwn {
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nvidia,pins = "lcd_pwr1_pc1";
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nvidia,function = "rsvd4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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cam_spi_clk_do {
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nvidia,pins = "uart2_txd_pc2",
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"uart2_rxd_pc3";
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nvidia,function = "spi4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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per_sensor_i2c {
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nvidia,pins = "gen1_i2c_scl_pc4",
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"gen1_i2c_sda_pc5";
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nvidia,function = "i2c1";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,open-drain = <TEGRA_PIN_ENABLE>;
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};
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mdm_ap2bb_slave_wakeup {
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nvidia,pins = "lcd_pwr2_pc6";
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nvidia,function = "displaya";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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mhl_int {
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nvidia,pins = "gmi_wp_n_pc7";
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nvidia,function = "rsvd1";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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/* PORT D */
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sdmmc3_data {
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nvidia,pins = "sdmmc3_dat5_pd0",
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"sdmmc3_dat4_pd1";
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nvidia,function = "sdmmc3";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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aud_1v8_en {
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nvidia,pins = "lcd_dc1_pd2";
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nvidia,function = "rsvd4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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sdmmc3_dat6_pd3 {
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nvidia,pins = "sdmmc3_dat6_pd3",
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"sdmmc3_dat7_pd4";
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nvidia,function = "rsvd1";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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/* PORT E */
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mhl_usb_sel {
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nvidia,pins = "lcd_d0_pe0";
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nvidia,function = "displaya";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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lcd_d1_pe1 {
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nvidia,pins = "lcd_d1_pe1";
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nvidia,function = "displaya";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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peh_cap_int {
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nvidia,pins = "lcd_d2_pe2";
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nvidia,function = "rsvd3";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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mhl_1v2_en {
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nvidia,pins = "lcd_d3_pe3",
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"lcd_d4_pe4";
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nvidia,function = "displaya";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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dsp_lcm_1v8_en {
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nvidia,pins = "lcd_d5_pe5";
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nvidia,function = "displaya";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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mhl_rst {
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nvidia,pins = "lcd_d6_pe6";
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nvidia,function = "rsvd3";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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peh_vibrator_on {
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nvidia,pins = "lcd_d7_pe7";
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nvidia,function = "displaya";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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/* PORT F */
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cam_vcm_2v85_pwr {
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nvidia,pins = "lcd_d8_pf0";
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nvidia,function = "rsvd4";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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lcd_d9_d13 {
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nvidia,pins = "lcd_d9_pf1",
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"lcd_d10_pf2",
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"lcd_d11_pf3",
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"lcd_d12_pf4",
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"lcd_d13_pf5";
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nvidia,function = "displaya";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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cam_cam2_core_1v8_en {
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nvidia,pins = "lcd_d14_pf6";
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nvidia,function = "rsvd4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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sys_pmu_msecure {
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nvidia,pins = "lcd_d15_pf7";
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nvidia,function = "rsvd4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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/* PORT G */
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bootstraps {
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nvidia,pins = "gmi_ad0_pg0",
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"gmi_ad1_pg1",
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"gmi_ad2_pg2",
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"gmi_ad3_pg3",
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"gmi_ad4_pg4",
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"gmi_ad5_pg5",
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"gmi_ad6_pg6",
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"gmi_ad7_pg7";
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nvidia,function = "rsvd4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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/* PORT H */
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haptic_pwm {
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nvidia,pins = "gmi_ad8_ph0";
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nvidia,function = "pwm0";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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gmi_ad9 {
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nvidia,pins = "gmi_ad9_ph1";
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nvidia,function = "rsvd4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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gmi_ad10 {
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nvidia,pins = "gmi_ad10_ph2";
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nvidia,function = "nand";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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dsp_tp_rst {
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nvidia,pins = "gmi_ad11_ph3",
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"gmi_ad12_ph4",
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"gmi_ad13_ph5",
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"gmi_ad14_ph6";
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nvidia,function = "rsvd4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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gmi_ad15 {
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nvidia,pins = "gmi_ad15_ph7";
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nvidia,function = "nand";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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/* PORT I */
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gmi_wr_n {
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nvidia,pins = "gmi_wr_n_pi0",
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"gmi_oe_n_pi1",
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"gmi_dqs_pi2",
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"gmi_cs6_n_pi3";
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nvidia,function = "rsvd4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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gmi_rst_n_pi4 {
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nvidia,pins = "gmi_rst_n_pi4";
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nvidia,function = "rsvd4";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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sim_detect {
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nvidia,pins = "gmi_iordy_pi5";
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nvidia,function = "rsvd1";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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peh_gyr_int {
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nvidia,pins = "gmi_cs7_n_pi6",
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"gmi_wait_pi7";
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nvidia,function = "rsvd4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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/* PORT J */
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mdm_bb2ap_host_wakeup {
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nvidia,pins = "gmi_cs0_n_pj0";
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nvidia,function = "gmi";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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dsp_lcm_de {
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nvidia,pins = "lcd_de_pj1";
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nvidia,function = "displaya";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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peh_comp_int {
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nvidia,pins = "gmi_cs1_n_pj2";
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nvidia,function = "rsvd1";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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lcd_hsync {
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nvidia,pins = "lcd_hsync_pj3";
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nvidia,function = "displaya";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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mdm_ap_usb_uart_oe {
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nvidia,pins = "lcd_vsync_pj4";
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nvidia,function = "displaya";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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mcam_spi_di_cs0 {
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nvidia,pins = "uart2_cts_n_pj5",
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"uart2_rts_n_pj6";
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nvidia,function = "spi4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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mdm_tx {
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nvidia,pins = "gmi_a16_pj7";
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nvidia,function = "uartd";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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/* PORT K */
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gmi_adv_n {
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nvidia,pins = "gmi_adv_n_pk0",
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"gmi_clk_pk1",
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"gmi_cs2_n_pk3";
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nvidia,function = "rsvd4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
gmi_cs4_n {
|
|
nvidia,pins = "gmi_cs4_n_pk2";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
gmi_cs3_n {
|
|
nvidia,pins = "gmi_cs3_n_pk4";
|
|
nvidia,function = "rsvd1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
spdif_out {
|
|
nvidia,pins = "spdif_out_pk5";
|
|
nvidia,function = "spdif";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
spdif_in {
|
|
nvidia,pins = "spdif_in_pk6";
|
|
nvidia,function = "spdif";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
mdm_rts {
|
|
nvidia,pins = "gmi_a19_pk7";
|
|
nvidia,function = "uartd";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
|
|
/* PORT L */
|
|
port_l {
|
|
nvidia,pins = "vi_d2_pl0",
|
|
"vi_d3_pl1",
|
|
"vi_d4_pl2",
|
|
"vi_d5_pl3",
|
|
"vi_d6_pl4",
|
|
"vi_d7_pl5",
|
|
"vi_d8_pl6",
|
|
"vi_d9_pl7";
|
|
nvidia,function = "sdmmc2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
/* PORT M */
|
|
dsp_lcd_id {
|
|
nvidia,pins = "lcd_d16_pm0",
|
|
"lcd_d17_pm1";
|
|
nvidia,function = "displaya";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
front_cam_rst {
|
|
nvidia,pins = "lcd_d18_pm2";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
mdm_v_dcin_modem_en {
|
|
nvidia,pins = "lcd_d19_pm3",
|
|
"lcd_d20_pm4";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
nfc_pins {
|
|
nvidia,pins = "lcd_d21_pm5",
|
|
"lcd_d22_pm6";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
cam_vaa_2v85_en {
|
|
nvidia,pins = "lcd_d23_pm7";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
/* PORT N */
|
|
mdm_ap2bb_rst_host_pwr {
|
|
nvidia,pins = "dap1_fs_pn0",
|
|
"dap1_din_pn1",
|
|
"dap1_sclk_pn3";
|
|
nvidia,function = "i2s0";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
mdm_bb_fatal_int {
|
|
nvidia,pins = "dap1_dout_pn2";
|
|
nvidia,function = "i2s0";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
lcd_cs0_n {
|
|
nvidia,pins = "lcd_cs0_n_pn4";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
lcd_sdout {
|
|
nvidia,pins = "lcd_sdout_pn5";
|
|
nvidia,function = "displaya";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
dsp_lcd_rst {
|
|
nvidia,pins = "lcd_dc0_pn6";
|
|
nvidia,function = "displaya";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
mhl_hpd {
|
|
nvidia,pins = "hdmi_int_pn7";
|
|
nvidia,function = "rsvd1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
/* PORT O */
|
|
ap_usb_uart_sel {
|
|
nvidia,pins = "ulpi_data7_po0";
|
|
nvidia,function = "spi2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
bsp_ap_debug_tx {
|
|
nvidia,pins = "ulpi_data0_po1";
|
|
nvidia,function = "uarta";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
bsp_ap_debug_rx {
|
|
nvidia,pins = "ulpi_data1_po2";
|
|
nvidia,function = "uarta";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
ulpi_data2 {
|
|
nvidia,pins = "ulpi_data2_po3";
|
|
nvidia,function = "spi3";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
con_wifi_irq {
|
|
nvidia,pins = "ulpi_data3_po4";
|
|
nvidia,function = "hsi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
per_gsensor_int {
|
|
nvidia,pins = "ulpi_data4_po5";
|
|
nvidia,function = "ulpi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
ulpi_data5_data6 {
|
|
nvidia,pins = "ulpi_data5_po6",
|
|
"ulpi_data6_po7";
|
|
nvidia,function = "ulpi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
/* PORT P */
|
|
aud_ap_pcm {
|
|
nvidia,pins = "dap3_fs_pp0",
|
|
"dap3_din_pp1",
|
|
"dap3_dout_pp2",
|
|
"dap3_sclk_pp3";
|
|
nvidia,function = "i2s2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
aud_btpcm {
|
|
nvidia,pins = "dap4_fs_pp4",
|
|
"dap4_din_pp5";
|
|
nvidia,function = "i2s3";
|
|
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
aud_ext {
|
|
nvidia,pins = "dap4_dout_pp6",
|
|
"dap4_sclk_pp7";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
|
|
/* PORT Q */
|
|
port_q {
|
|
nvidia,pins = "kb_col0_pq0",
|
|
"kb_col1_pq1",
|
|
"kb_col2_pq2",
|
|
"kb_col3_pq3",
|
|
"kb_col4_pq4",
|
|
"kb_col5_pq5",
|
|
"kb_col6_pq6",
|
|
"kb_col7_pq7";
|
|
nvidia,function = "kbc";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
/* PORT R */
|
|
raw_intr0 {
|
|
nvidia,pins = "kb_row0_pr0";
|
|
nvidia,function = "kbc";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
per_torch_en {
|
|
nvidia,pins = "kb_row1_pr1";
|
|
nvidia,function = "kbc";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
gyro_pwr {
|
|
nvidia,pins = "kb_row2_pr2";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
haptic_en {
|
|
nvidia,pins = "kb_row3_pr3";
|
|
nvidia,function = "rsvd3";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
kb_row4_row5 {
|
|
nvidia,pins = "kb_row4_pr4",
|
|
"kb_row5_pr5";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
cam_id {
|
|
nvidia,pins = "kb_row6_pr6",
|
|
"kb_row7_pr7";
|
|
nvidia,function = "kbc";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
/* PORT S */
|
|
dsp_vol_up {
|
|
nvidia,pins = "kb_row8_ps0";
|
|
nvidia,function = "kbc";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
con_usb_id_1 {
|
|
nvidia,pins = "kb_row9_ps1",
|
|
"kb_row10_ps2";
|
|
nvidia,function = "kbc";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
port_s {
|
|
nvidia,pins = "kb_row11_ps3",
|
|
"kb_row12_ps4",
|
|
"kb_row13_ps5",
|
|
"kb_row14_ps6",
|
|
"kb_row15_ps7";
|
|
nvidia,function = "kbc";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
/* PORT T */
|
|
dsp_tw_i2c {
|
|
nvidia,pins = "gen2_i2c_scl_pt5",
|
|
"gen2_i2c_sda_pt6";
|
|
nvidia,function = "i2c2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
per_emmc_cmd {
|
|
nvidia,pins = "sdmmc4_cmd_pt7";
|
|
nvidia,function = "sdmmc4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
/* PORT U */
|
|
con_bt_en {
|
|
nvidia,pins = "pu0", "pu1", "pu2",
|
|
"pu3", "pu4";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
per_capsensor_int_cpu {
|
|
nvidia,pins = "pu5";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
dsp_ap_kpdpwr {
|
|
nvidia,pins = "pu6";
|
|
nvidia,function = "pwm3";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
jtag_rtck {
|
|
nvidia,pins = "jtag_rtck_pu7";
|
|
nvidia,function = "rtck";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
/* PORT V */
|
|
mdm_bb2ap_suspend_req {
|
|
nvidia,pins = "pv0";
|
|
nvidia,function = "rsvd1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
dsp_tp_att {
|
|
nvidia,pins = "pv1";
|
|
nvidia,function = "rsvd1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
con_wifi_en {
|
|
nvidia,pins = "pv2", "pv3";
|
|
nvidia,function = "rsvd2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
mhl_ddc {
|
|
nvidia,pins = "ddc_scl_pv4",
|
|
"ddc_sda_pv5";
|
|
nvidia,function = "i2c4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
crt_hsync {
|
|
nvidia,pins = "crt_hsync_pv6";
|
|
nvidia,function = "crt";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
crt_vsync {
|
|
nvidia,pins = "crt_vsync_pv7";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
|
|
/* PORT W */
|
|
pwr_chg_stat {
|
|
nvidia,pins = "lcd_cs1_n_pw0";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
dsp_bl_pwm_cpu {
|
|
nvidia,pins = "lcd_m1_pw1";
|
|
nvidia,function = "displaya";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
aud_hp_det {
|
|
nvidia,pins = "spi2_cs1_n_pw2";
|
|
nvidia,function = "spi2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
dsp_vol_down {
|
|
nvidia,pins = "spi2_cs2_n_pw3";
|
|
nvidia,function = "spi2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
aud_mclk {
|
|
nvidia,pins = "clk1_out_pw4";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
aud_aic3008_rst {
|
|
nvidia,pins = "clk2_out_pw5";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
con_bt_tx {
|
|
nvidia,pins = "uart3_txd_pw6";
|
|
nvidia,function = "uartc";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
con_bt_rx {
|
|
nvidia,pins = "uart3_rxd_pw7";
|
|
nvidia,function = "uartc";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
/* PORT X */
|
|
aud_spi_do {
|
|
nvidia,pins = "spi2_mosi_px0",
|
|
"spi2_sck_px2",
|
|
"spi2_cs0_n_px3";
|
|
nvidia,function = "spi2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
aud_spi_di {
|
|
nvidia,pins = "spi2_miso_px1";
|
|
nvidia,function = "spi2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
spi1_mosi {
|
|
nvidia,pins = "spi1_mosi_px4";
|
|
nvidia,function = "spi1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
pwr_chg_int {
|
|
nvidia,pins = "spi1_sck_px5";
|
|
nvidia,function = "spi2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
spi1_cs0_n {
|
|
nvidia,pins = "spi1_cs0_n_px6";
|
|
nvidia,function = "spi1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
audio_mclk_en {
|
|
nvidia,pins = "spi1_miso_px7";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
|
|
/* PORT Y */
|
|
led_drv_en_trig {
|
|
nvidia,pins = "ulpi_clk_py0",
|
|
"ulpi_dir_py1";
|
|
nvidia,function = "rsvd2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
mhl_3v3_en {
|
|
nvidia,pins = "ulpi_nxt_py2";
|
|
nvidia,function = "ulpi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
peh_v_srio_1v8_en {
|
|
nvidia,pins = "ulpi_stp_py3";
|
|
nvidia,function = "ulpi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
aud_remo_tx {
|
|
nvidia,pins = "sdmmc1_dat3_py4";
|
|
nvidia,function = "uarte";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
aud_remo_rx {
|
|
nvidia,pins = "sdmmc1_dat2_py5";
|
|
nvidia,function = "uarte";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
nfc_irq {
|
|
nvidia,pins = "sdmmc1_dat1_py6";
|
|
nvidia,function = "rsvd2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
testpoint1 {
|
|
nvidia,pins = "sdmmc1_dat0_py7";
|
|
nvidia,function = "sdmmc1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
/* PORT Z */
|
|
aud_remo_oe {
|
|
nvidia,pins = "sdmmc1_clk_pz0";
|
|
nvidia,function = "sdmmc1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
testpoint2 {
|
|
nvidia,pins = "sdmmc1_cmd_pz1";
|
|
nvidia,function = "sdmmc1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
mdm_usb_uart_oe {
|
|
nvidia,pins = "lcd_sdin_pz2";
|
|
nvidia,function = "displaya";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
lcd_wr_n {
|
|
nvidia,pins = "lcd_wr_n_pz3";
|
|
nvidia,function = "displaya";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
lcd_sck {
|
|
nvidia,pins = "lcd_sck_pz4";
|
|
nvidia,function = "displaya";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
sys_clk_req {
|
|
nvidia,pins = "sys_clk_req_pz5";
|
|
nvidia,function = "sysclk";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
sys_pwr_i2c {
|
|
nvidia,pins = "pwr_i2c_scl_pz6",
|
|
"pwr_i2c_sda_pz7";
|
|
nvidia,function = "i2cpwr";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
/* PORT AA */
|
|
bsp_emmc {
|
|
nvidia,pins = "sdmmc4_dat0_paa0",
|
|
"sdmmc4_dat1_paa1",
|
|
"sdmmc4_dat2_paa2",
|
|
"sdmmc4_dat3_paa3",
|
|
"sdmmc4_dat4_paa4",
|
|
"sdmmc4_dat5_paa5",
|
|
"sdmmc4_dat6_paa6",
|
|
"sdmmc4_dat7_paa7";
|
|
nvidia,function = "sdmmc4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
/* PORT BB */
|
|
cam1_rst {
|
|
nvidia,pins = "pbb0";
|
|
nvidia,function = "rsvd3";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
cam_i2c {
|
|
nvidia,pins = "cam_i2c_scl_pbb1",
|
|
"cam_i2c_sda_pbb2";
|
|
nvidia,function = "i2c3";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
per_flash_en {
|
|
nvidia,pins = "pbb3";
|
|
nvidia,function = "vgp3";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
cam_vddio_1v8_en {
|
|
nvidia,pins = "pbb4";
|
|
nvidia,function = "vgp4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
cam1_vcm_pd {
|
|
nvidia,pins = "pbb5";
|
|
nvidia,function = "vgp5";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
aud_remo_pres {
|
|
nvidia,pins = "pbb6";
|
|
nvidia,function = "vgp6";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
front_cam_standby {
|
|
nvidia,pins = "pbb7";
|
|
nvidia,function = "rsvd3";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
/* PORT CC */
|
|
cam_mclk {
|
|
nvidia,pins = "cam_mclk_pcc0";
|
|
nvidia,function = "vi_alt3";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
cam_sel {
|
|
nvidia,pins = "pcc1";
|
|
nvidia,function = "rsvd3";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
pwr_themp_alert_int {
|
|
nvidia,pins = "pcc2";
|
|
nvidia,function = "rsvd3";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
bsp_emmc_resout {
|
|
nvidia,pins = "sdmmc4_rst_n_pcc3";
|
|
nvidia,function = "rsvd2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
bsp_emmc_clk {
|
|
nvidia,pins = "sdmmc4_clk_pcc4";
|
|
nvidia,function = "sdmmc4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
aud_dock_out_en {
|
|
nvidia,pins = "clk2_req_pcc5";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
|
|
/* PORT DD */
|
|
/* PORT EE */
|
|
clk3_out {
|
|
nvidia,pins = "clk3_out_pee0";
|
|
nvidia,function = "extperiph3";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
raw_intr1 {
|
|
nvidia,pins = "clk3_req_pee1";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
clk1_req {
|
|
nvidia,pins = "clk1_req_pee2";
|
|
nvidia,function = "dap";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
hdmi_cec {
|
|
nvidia,pins = "hdmi_cec_pee3";
|
|
nvidia,function = "cec";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
owr {
|
|
nvidia,pins = "owr";
|
|
nvidia,function = "owr";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
};
|
|
};
|
|
|
|
uarta: serial@70006000 {
|
|
status = "okay";
|
|
};
|
|
|
|
pwr_i2c: i2c@7000d000 {
|
|
status = "okay";
|
|
clock-frequency = <100000>;
|
|
|
|
/* Texas Instruments TPS80032 PMIC */
|
|
pmic: tps80032@48 {
|
|
compatible = "ti,tps80032";
|
|
reg = <0x48>;
|
|
|
|
ti,system-power-controller;
|
|
|
|
regulators {
|
|
vdd_1v8_vio: smps5 {
|
|
regulator-name = "vdd_1v8_gen";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
/* DSI VDD */
|
|
avdd_dsi_csi: ldo1 {
|
|
regulator-name = "avdd_dsi_csi";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-boot-on;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
sdmmc4: sdhci@78000600 {
|
|
status = "okay";
|
|
bus-width = <8>;
|
|
non-removable;
|
|
|
|
vmmc-supply = <&vcore_emmc>;
|
|
vqmmc-supply = <&vdd_1v8_vio>;
|
|
};
|
|
|
|
micro_usb: usb@7d000000 {
|
|
status = "okay";
|
|
dr_mode = "otg";
|
|
};
|
|
|
|
usb-phy@7d000000 {
|
|
status = "okay";
|
|
nvidia,hssync-start-delay = <0>;
|
|
nvidia,xcvr-lsfslew = <2>;
|
|
nvidia,xcvr-lsrslew = <2>;
|
|
};
|
|
|
|
backlight: backlight {
|
|
compatible = "nvidia,tegra-pwm-backlight";
|
|
|
|
nvidia,pwm-source = <1>;
|
|
nvidia,default-brightness = <0x8E>;
|
|
};
|
|
|
|
/* PMIC has a built-in 32KHz oscillator which is used by PMC */
|
|
clk32k_in: clock-32k {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-frequency = <32768>;
|
|
clock-output-names = "pmic-oscillator";
|
|
};
|
|
|
|
gpio-keys {
|
|
compatible = "gpio-keys";
|
|
|
|
key-power {
|
|
label = "Power";
|
|
gpios = <&gpio TEGRA_GPIO(U, 6) GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_ENTER>;
|
|
};
|
|
|
|
key-volume-up {
|
|
label = "Volume Up";
|
|
gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_UP>;
|
|
};
|
|
|
|
key-volume-down {
|
|
label = "Volume Down";
|
|
gpios = <&gpio TEGRA_GPIO(W, 3) GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_DOWN>;
|
|
};
|
|
};
|
|
|
|
panel: panel {
|
|
compatible = "htc,edge-panel";
|
|
|
|
reset-gpios = <&gpio TEGRA_GPIO(N, 6) GPIO_ACTIVE_LOW>;
|
|
|
|
vdd-supply = <&vdd_3v3_panel>;
|
|
vddio-supply = <&vdd_1v8_panel>;
|
|
|
|
backlight = <&backlight>;
|
|
};
|
|
|
|
vcore_emmc: regulator-emmc {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vdd_2v85_sdmmc";
|
|
regulator-min-microvolt = <2850000>;
|
|
regulator-max-microvolt = <2850000>;
|
|
gpio = <&gpio TEGRA_GPIO(M, 3) GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
};
|
|
|
|
vdd_3v3_panel: regulator-lcm {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "v_lcm_3v3";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
gpio = <&gpio TEGRA_GPIO(E, 2) GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
};
|
|
|
|
vdd_1v8_panel: regulator-lcmio {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "v_lcmio_1v8";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
gpio = <&gpio TEGRA_GPIO(E, 5) GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
};
|
|
};
|