T Karthik Reddy bf8dae5fcf spi: cadence-qspi: reset qspi flash for versal platform ... When flash operated at non default mode like DDR, flash need to be reset to operate in SDR mode to read flash ids by spi-nor framework. Reset the flash to the default state before using the flash. This reset is handled by a gpio driver, in case of mini U-Boot as gpio driver is disabled, we do raw read and write access by the registers. Versal platform utilizes spi calibration for read delay programming, so incase by default read delay property is set in DT. We make sure not to use read delay from DT by overwriting read_delay with -1. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Link: https://lore.kernel.org/r/20220512100535.16364-4-ashok.reddy.soma@xilinx.com Signed-off-by: Michal Simek <michal.simek@amd.com>		2022-06-29 16:00:31 +02:00
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hardware.h	spi: cadence-qspi: reset qspi flash for versal platform	2022-06-29 16:00:31 +02:00
sys_proto.h	xilinx: zynqmp: synchronize firmware call return payload	2020-08-20 09:49:20 +02:00